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    Searched defs:insn (Results 1 - 25 of 70) sorted by relevancy

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  /src/sys/arch/alpha/alpha/
patch.c 71 alpha_instruction insn = { local
82 *lock_stub_patch_table[i] = insn.bits;
patch.c 71 alpha_instruction insn = { local
82 *lock_stub_patch_table[i] = insn.bits;
db_interface.c 391 alpha_instruction insn; local
393 insn.bits = ins;
394 return ((insn.branch_format.opcode == op_bsr) ||
395 ((insn.jump_format.opcode == op_j) &&
396 (insn.jump_format.action & 1)));
402 alpha_instruction insn; local
404 insn.bits = ins;
405 return ((insn.jump_format.opcode == op_j) &&
406 (insn.jump_format.action == op_ret));
412 alpha_instruction insn; local
422 alpha_instruction insn; local
451 alpha_instruction insn; local
486 alpha_instruction insn; local
516 alpha_instruction insn; local
545 alpha_instruction insn; local
    [all...]
  /src/sys/arch/aarch64/aarch64/
db_disasm.c 139 uint32_t insn = 0; local
143 size = fetch_arm_insn(pc, spsr, &insn);
147 ".insn 0x%0*x (%s)", size * 2, insn, arch);
db_disasm.c 139 uint32_t insn = 0; local
143 size = fetch_arm_insn(pc, spsr, &insn);
147 ".insn 0x%0*x (%s)", size * 2, insn, arch);
kobj_machdep.c 130 uint32_t *insn, immhi, immlo, shift; local
162 insn = (uint32_t *)where;
193 le32toh(*insn), strdisasm((vaddr_t)insn, 0));
256 *insn = htole32(
257 (le32toh(*insn) & ~__BITS(21,10)) | (val << 10));
278 *insn = htole32((le32toh(*insn) &
302 *insn = htole32((le32toh(*insn) & ~__BITS(25,0)) | val)
    [all...]
kobj_machdep.c 130 uint32_t *insn, immhi, immlo, shift; local
162 insn = (uint32_t *)where;
193 le32toh(*insn), strdisasm((vaddr_t)insn, 0));
256 *insn = htole32(
257 (le32toh(*insn) & ~__BITS(21,10)) | (val << 10));
278 *insn = htole32((le32toh(*insn) &
302 *insn = htole32((le32toh(*insn) & ~__BITS(25,0)) | val)
    [all...]
  /src/sys/arch/mips/mips/
kobj_machdep.c 70 uint32_t *insn; local
94 insn = (void *)where;
129 KASSERT((*insn & 0x3ffffff) == 0);
130 DPRINTF(" orig insn = 0x%08x\n", *insn);
131 *insn |= addr;
132 DPRINTF(" new insn = 0x%08x\n", *insn);
142 KASSERT((*insn & 0xffff) == 0);
143 DPRINTF(" orig insn = 0x%08x\n", *insn)
    [all...]
kobj_machdep.c 70 uint32_t *insn; local
94 insn = (void *)where;
129 KASSERT((*insn & 0x3ffffff) == 0);
130 DPRINTF(" orig insn = 0x%08x\n", *insn);
131 *insn |= addr;
132 DPRINTF(" new insn = 0x%08x\n", *insn);
142 KASSERT((*insn & 0xffff) == 0);
143 DPRINTF(" orig insn = 0x%08x\n", *insn)
    [all...]
  /src/sys/arch/arm/arm/
syscall.c 97 uint32_t insn; local
132 insn = 0xef000000 | SWI_OS_NETBSD | tf->tf_r0;
138 insn = read_insn(tf->tf_pc - INSN_SIZE, true);
160 if ((insn & 0x0f000000) != 0x0f000000) {
170 (*l->l_proc->p_md.md_syscall)(tf, l, insn);
182 syscall(struct trapframe *tf, lwp_t *l, uint32_t insn)
194 const uint32_t os_mask = insn & SWI_OS_MASK;
195 uint32_t code = insn & 0x000fffff;
201 const uint32_t swi = __SHIFTOUT(insn, __BITS(23,0));
217 ksi.ksi_trap = insn;
    [all...]
syscall.c 97 uint32_t insn; local
132 insn = 0xef000000 | SWI_OS_NETBSD | tf->tf_r0;
138 insn = read_insn(tf->tf_pc - INSN_SIZE, true);
160 if ((insn & 0x0f000000) != 0x0f000000) {
170 (*l->l_proc->p_md.md_syscall)(tf, l, insn);
182 syscall(struct trapframe *tf, lwp_t *l, uint32_t insn)
194 const uint32_t os_mask = insn & SWI_OS_MASK;
195 uint32_t code = insn & 0x000fffff;
201 const uint32_t swi = __SHIFTOUT(insn, __BITS(23,0));
217 ksi.ksi_trap = insn;
    [all...]
undefined.c 126 cp15_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)
140 const u_int regno = (insn >> 12) & 15;
152 if ((insn & 0xffff0fff) == 0xee1d0f70) {
162 if ((insn & 0xffef0fff) == 0xee0d0f50) {
164 if (insn & 0x00100000)
177 gdb_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)
183 if (insn == GDB_THUMB_BREAKPOINT)
189 if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
221 vfp_test(u_int address, u_int insn, trapframe_t *frame, int fault_code
261 u_int insn = read_insn(addr, false); local
    [all...]
undefined.c 126 cp15_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)
140 const u_int regno = (insn >> 12) & 15;
152 if ((insn & 0xffff0fff) == 0xee1d0f70) {
162 if ((insn & 0xffef0fff) == 0xee0d0f50) {
164 if (insn & 0x00100000)
177 gdb_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)
183 if (insn == GDB_THUMB_BREAKPOINT)
189 if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
221 vfp_test(u_int address, u_int insn, trapframe_t *frame, int fault_code
261 u_int insn = read_insn(addr, false); local
    [all...]
disassem.c 66 * insn[cc][mod] [operands]
435 u_int insn; local
443 di->di_printf("thumb insn\n");
449 insn = di->di_readword(loc);
451 insn = bswap32(insn);
456 /* di->di_printf("loc=%08x insn=%08x : ", loc, insn);*/
459 if ((insn & i_ptr->mask) == i_ptr->pattern) {
467 di->di_printf("und%s\t%08x\n", insn_condition(insn), insn)
    [all...]
  /src/libexec/ld.elf_so/arch/alpha/
alpha_reloc.c 409 uint32_t insn[3], *stubptr; local
460 * First, build an LDA insn to adjust the low 16
463 insn[insncnt++] = 0x08 << 26 | 27 << 21 | 27 << 16 |
476 insn[insncnt++] = 0x09 << 26 | 27 << 21 |
506 insn[insncnt++] = 0x09 << 26 | 27 << 21 |
512 insn[insncnt++] = 0x29 << 26 | 27 << 21 |
519 * Now, build a JMP or BR insn to jump to the target. If
521 * we can use the more efficient BR insn. Otherwise, we
527 insn[insncnt++] = 0x30 << 26 | 31 << 21 |
531 insn[insncnt++] = 0x1a << 26 | 31 << 21
    [all...]
alpha_reloc.c 409 uint32_t insn[3], *stubptr; local
460 * First, build an LDA insn to adjust the low 16
463 insn[insncnt++] = 0x08 << 26 | 27 << 21 | 27 << 16 |
476 insn[insncnt++] = 0x09 << 26 | 27 << 21 |
506 insn[insncnt++] = 0x09 << 26 | 27 << 21 |
512 insn[insncnt++] = 0x29 << 26 | 27 << 21 |
519 * Now, build a JMP or BR insn to jump to the target. If
521 * we can use the more efficient BR insn. Otherwise, we
527 insn[insncnt++] = 0x30 << 26 | 31 << 21 |
531 insn[insncnt++] = 0x1a << 26 | 31 << 21
    [all...]
  /src/sys/arch/arm/include/
locore.h 208 uint32_t insn; local
210 __asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va));
212 insn = *(const uint32_t *)va;
215 insn = bswap32(insn);
217 return insn;
227 uint32_t insn; local
230 __asm __volatile("ldrht %0, [%1, #0]" : "=&r"(insn) : "r"(va));
232 __asm __volatile("ldrht %0, [%1], #0" : "=&r"(insn) : "r"(va));
234 __asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va & ~3))
    [all...]
locore.h 208 uint32_t insn; local
210 __asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va));
212 insn = *(const uint32_t *)va;
215 insn = bswap32(insn);
217 return insn;
227 uint32_t insn; local
230 __asm __volatile("ldrht %0, [%1, #0]" : "=&r"(insn) : "r"(va));
232 __asm __volatile("ldrht %0, [%1], #0" : "=&r"(insn) : "r"(va));
234 __asm __volatile("ldrt %0, [%1]" : "=&r"(insn) : "r"(va & ~3))
    [all...]
  /src/sys/arch/powerpc/powerpc/
process_machdep.c 292 ppc_ifetch(struct lwp *l, vaddr_t va, uint32_t *insn)
297 iov.iov_base = insn;
298 iov.iov_len = sizeof(*insn);
302 uio.uio_resid = sizeof(*insn);
310 ppc_istore(struct lwp *l, vaddr_t va, uint32_t insn)
315 iov.iov_base = &insn;
316 iov.iov_len = sizeof(insn);
320 uio.uio_resid = sizeof(insn);
339 uint32_t insn; local
353 if ((rv = ppc_ifetch(l, va[0], &insn)) != 0
    [all...]
process_machdep.c 292 ppc_ifetch(struct lwp *l, vaddr_t va, uint32_t *insn)
297 iov.iov_base = insn;
298 iov.iov_len = sizeof(*insn);
302 uio.uio_resid = sizeof(*insn);
310 ppc_istore(struct lwp *l, vaddr_t va, uint32_t insn)
315 iov.iov_base = &insn;
316 iov.iov_len = sizeof(insn);
320 uio.uio_resid = sizeof(insn);
339 uint32_t insn; local
353 if ((rv = ppc_ifetch(l, va[0], &insn)) != 0
    [all...]
  /src/sys/arch/sparc/sparc/
trap.c 173 "insn access MMU miss", /* 3c */
819 u_int insn; local
820 if (ufetch_int((void *)pc, &insn) == 0 &&
821 (insn & 0xc1680000) == 0xc0680000) {
trap.c 173 "insn access MMU miss", /* 3c */
819 u_int insn; local
820 if (ufetch_int((void *)pc, &insn) == 0 &&
821 (insn & 0xc1680000) == 0xc0680000) {
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/
nouveau_nvkm_engine_gr_nv40.c 118 u32 insn = nvkm_rd32(device, 0x400308); local
119 nvkm_warn(subdev, "ctxprog timeout %08x\n", insn);
nouveau_nvkm_engine_gr_nv40.c 118 u32 insn = nvkm_rd32(device, 0x400308); local
119 nvkm_warn(subdev, "ctxprog timeout %08x\n", insn);
  /src/sys/arch/arm/arm32/
fault.c 207 printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
214 printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
416 u_int insn = read_thumb_insn(tf->tf_pc, user); local
417 u_int insn_f8 = insn & 0xf800;
418 u_int insn_fe = insn & 0xfe00;
435 u_int insn = read_insn(tf->tf_pc, user); local
437 if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
438 ((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
439 ((insn & 0x0a100000) == 0x08000000) || /* STM/CDT*/
440 ((insn & 0x0f9000f0) == 0x01800090)) /* STREX[BDH] *
    [all...]

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