| /src/sys/arch/arm/at91/ |
| at91aic.c | 426 uint32_t ipr;
430 ipr = AICREG(AIC_IPR);
431 if ((ipr & (1U << irq) & ~aic_imask[pcpl]))
445 uint32_t ipr; local in function:at91aic_intr_poll
449 ipr = AICREG(AIC_IPR);
450 if ((ipr & (1U << irq))
|
| at91aic.c | 426 uint32_t ipr;
430 ipr = AICREG(AIC_IPR);
431 if ((ipr & (1U << irq) & ~aic_imask[pcpl]))
445 uint32_t ipr; local in function:at91aic_intr_poll
449 ipr = AICREG(AIC_IPR);
450 if ((ipr & (1U << irq))
|
| /src/sys/arch/arm/ti/ |
| ti_edma.c | 249 uint64_t ipr, ier; local in function:edma_intr
252 ipr = EDMA_READ(sc, EDMA_IPR_REG);
253 ipr |= (uint64_t)EDMA_READ(sc, EDMA_IPRH_REG) << 32;
254 if (ipr == 0)
260 DPRINTF(2, (sc->sc_dev, "ipr = 0x%016llx ier 0x%016llx\n", ipr, ier));
262 EDMA_WRITE(sc, EDMA_ICR_REG, ipr & 0xffffffff);
263 EDMA_WRITE(sc, EDMA_ICRH_REG, ipr >> 32);
265 while ((bit = ffs64(ipr)) != 0) {
267 ipr &= ~__BIT(idx)
[all...] |
| ti_edma.c | 249 uint64_t ipr, ier; local in function:edma_intr
252 ipr = EDMA_READ(sc, EDMA_IPR_REG);
253 ipr |= (uint64_t)EDMA_READ(sc, EDMA_IPRH_REG) << 32;
254 if (ipr == 0)
260 DPRINTF(2, (sc->sc_dev, "ipr = 0x%016llx ier 0x%016llx\n", ipr, ier));
262 EDMA_WRITE(sc, EDMA_ICR_REG, ipr & 0xffffffff);
263 EDMA_WRITE(sc, EDMA_ICRH_REG, ipr >> 32);
265 while ((bit = ffs64(ipr)) != 0) {
267 ipr &= ~__BIT(idx)
[all...] |
| /src/sys/dev/pci/ |
| emuxki.c | 924 uint32_t ipr; local in function:emuxki_intr
930 ipr = emuxki_readio_4(sc, EMU_IPR);
931 DPRINTFN(3, "emuxki: ipr=%08x\n", ipr);
932 if (sc->pintr && (ipr & EMU_IPR_INTERVALTIMER)) {
954 (ipr & (EMU_IPR_ADCBUFHALFFULL | EMU_IPR_ADCBUFFULL))) {
960 if (ipr & EMU_IPR_ADCBUFFULL) {
1008 , ipr);
1017 emuxki_writeio_4(sc, EMU_IPR, ipr);
|
| emuxki.c | 924 uint32_t ipr; local in function:emuxki_intr
930 ipr = emuxki_readio_4(sc, EMU_IPR);
931 DPRINTFN(3, "emuxki: ipr=%08x\n", ipr);
932 if (sc->pintr && (ipr & EMU_IPR_INTERVALTIMER)) {
954 (ipr & (EMU_IPR_ADCBUFHALFFULL | EMU_IPR_ADCBUFFULL))) {
960 if (ipr & EMU_IPR_ADCBUFFULL) {
1008 , ipr);
1017 emuxki_writeio_4(sc, EMU_IPR, ipr);
|
| /src/sys/arch/hppa/dev/ |
| dino.c | 71 uint32_t ipr; /* 0x01c rw intr pending reg */ member in struct:dino_regs
|
| dino.c | 71 uint32_t ipr; /* 0x01c rw intr pending reg */ member in struct:dino_regs
|
