| /src/sys/dev/hid/ |
| hidkbd.c | 702 unsigned int i, ivar = 0; local in function:hidkbd_parse_desc
713 ivar++;
717 if (ivar > MAXVARS) {
719 ivar = MAXVARS;
722 kbd->sc_nvar = ivar;
778 if (kbd->sc_nkeycode == 0 && ivar == 0)
|
| hidkbd.c | 702 unsigned int i, ivar = 0; local in function:hidkbd_parse_desc
713 ivar++;
717 if (ivar > MAXVARS) {
719 ivar = MAXVARS;
722 kbd->sc_nvar = ivar;
778 if (kbd->sc_nkeycode == 0 && ivar == 0)
|
| /src/sys/dev/pci/ixgbe/ |
| ixv.c | 2361 * Setup the correct IVAR register for a particular MSI-X interrupt
2370 u32 ivar, index; local in function:ixv_set_ivar
2374 if (type == -1) { /* MISC IVAR */
2375 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
2376 ivar &= ~0xFF;
2377 ivar |= vector;
2378 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
2381 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(entry >> 1));
2382 ivar &= ~(0xffUL << index);
2383 ivar |= ((u32)vector << index)
[all...] |
| ixv.c | 2361 * Setup the correct IVAR register for a particular MSI-X interrupt
2370 u32 ivar, index; local in function:ixv_set_ivar
2374 if (type == -1) { /* MISC IVAR */
2375 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
2376 ivar &= ~0xFF;
2377 ivar |= vector;
2378 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
2381 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(entry >> 1));
2382 ivar &= ~(0xffUL << index);
2383 ivar |= ((u32)vector << index)
[all...] |
| ixgbe.c | 4328 * Setup the correct IVAR register for a particular MSI-X interrupt
4338 u32 ivar, index; local in function:ixgbe_set_ivar
4349 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
4350 ivar &= ~(0xffUL << (8 * (entry & 0x3)));
4351 ivar |= ((u32)vector << (8 * (entry & 0x3)));
4352 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar);
4359 if (type == -1) { /* MISC IVAR */
4361 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
4362 ivar &= ~(0xffUL << index);
4363 ivar |= ((u32)vector << index)
[all...] |
| ixgbe.c | 4328 * Setup the correct IVAR register for a particular MSI-X interrupt
4338 u32 ivar, index; local in function:ixgbe_set_ivar
4349 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
4350 ivar &= ~(0xffUL << (8 * (entry & 0x3)));
4351 ivar |= ((u32)vector << (8 * (entry & 0x3)));
4352 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar);
4359 if (type == -1) { /* MISC IVAR */
4361 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
4362 ivar &= ~(0xffUL << index);
4363 ivar |= ((u32)vector << index)
[all...] |
| /src/sys/dev/pci/igc/ |
| if_igc.c | 2629 uint32_t ivar; local in function:igc_configure_queues
2654 ivar = IGC_READ_REG_ARRAY(hw, IGC_IVAR0, 0);
2655 DPRINTF(CFG, "ivar(0)=0x%x\n", ivar);
2656 ivar = IGC_READ_REG_ARRAY(hw, IGC_IVAR0, 1);
2657 DPRINTF(CFG, "ivar(1)=0x%x\n", ivar);
2661 ivar = (sc->linkvec | IGC_IVAR_VALID) << 8;
2663 IGC_WRITE_REG(hw, IGC_IVAR_MISC, ivar);
2671 uint32_t ivar = IGC_READ_REG_ARRAY(hw, IGC_IVAR0, index) local in function:igc_set_queues
[all...] |
| if_igc.c | 2629 uint32_t ivar; local in function:igc_configure_queues
2654 ivar = IGC_READ_REG_ARRAY(hw, IGC_IVAR0, 0);
2655 DPRINTF(CFG, "ivar(0)=0x%x\n", ivar);
2656 ivar = IGC_READ_REG_ARRAY(hw, IGC_IVAR0, 1);
2657 DPRINTF(CFG, "ivar(1)=0x%x\n", ivar);
2661 ivar = (sc->linkvec | IGC_IVAR_VALID) << 8;
2663 IGC_WRITE_REG(hw, IGC_IVAR_MISC, ivar);
2671 uint32_t ivar = IGC_READ_REG_ARRAY(hw, IGC_IVAR0, index) local in function:igc_set_queues
[all...] |
| /src/sys/dev/pci/ |
| if_wm.c | 7271 uint32_t ivar, qintr_idx; local in function:wm_init_locked
7307 ivar = 0;
7314 ivar |= __SHIFTIN((IVAR_VALID_82574|qintr_idx),
7316 ivar |= __SHIFTIN((IVAR_VALID_82574|qintr_idx),
7320 ivar |= __SHIFTIN((IVAR_VALID_82574
7322 CSR_WRITE(sc, WMREG_IVAR, ivar | IVAR_INT_ON_ALL_WB);
7340 ivar = CSR_READ(sc, WMREG_IVAR_Q(qid));
7341 ivar &= ~IVAR_TX_MASK_Q(qid);
7342 ivar |= __SHIFTIN((qintr_idx
7345 ivar &= ~IVAR_RX_MASK_Q(qid)
[all...] |
| if_wm.c | 7271 uint32_t ivar, qintr_idx; local in function:wm_init_locked
7307 ivar = 0;
7314 ivar |= __SHIFTIN((IVAR_VALID_82574|qintr_idx),
7316 ivar |= __SHIFTIN((IVAR_VALID_82574|qintr_idx),
7320 ivar |= __SHIFTIN((IVAR_VALID_82574
7322 CSR_WRITE(sc, WMREG_IVAR, ivar | IVAR_INT_ON_ALL_WB);
7340 ivar = CSR_READ(sc, WMREG_IVAR_Q(qid));
7341 ivar &= ~IVAR_TX_MASK_Q(qid);
7342 ivar |= __SHIFTIN((qintr_idx
7345 ivar &= ~IVAR_RX_MASK_Q(qid)
[all...] |
