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    Searched defs:max_pix_clk (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce120/
amdgpu_dce120_clk_mgr.c	95 int max_pix_clk = dce_get_max_pixel_clock_for_all_paths(context); local in function:dce12_update_clocks 117 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr_base->clks.phyclk_khz)) { 119 clock_voltage_req.clocks_in_khz = max_pix_clk; 120 clk_mgr_base->clks.phyclk_khz = max_pix_clk;
amdgpu_dce120_clk_mgr.c	95 int max_pix_clk = dce_get_max_pixel_clock_for_all_paths(context); local in function:dce12_update_clocks 117 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr_base->clks.phyclk_khz)) { 119 clock_voltage_req.clocks_in_khz = max_pix_clk; 120 clk_mgr_base->clks.phyclk_khz = max_pix_clk;
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/
amdgpu_dce_clk_mgr.c	172 uint32_t max_pix_clk = 0; local in function:dce_get_max_pixel_clock_for_all_paths 185 if (pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10 > max_pix_clk) 186 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10; 192 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk > max_pix_clk) 193 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_sym_clk; 196 return max_pix_clk; 206 int max_pix_clk = dce_get_max_pixel_clock_for_all_paths(context); local in function:dce_get_required_clocks_state 215 || max_pix_clk >
amdgpu_dce_clk_mgr.c	172 uint32_t max_pix_clk = 0; local in function:dce_get_max_pixel_clock_for_all_paths 185 if (pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10 > max_pix_clk) 186 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10; 192 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk > max_pix_clk) 193 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_sym_clk; 196 return max_pix_clk; 206 int max_pix_clk = dce_get_max_pixel_clock_for_all_paths(context); local in function:dce_get_required_clocks_state 215 || max_pix_clk >
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_clk_mgr.c	191 uint32_t max_pix_clk = 0; local in function:get_max_pixel_clock_for_all_paths 204 if (pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10 > max_pix_clk) 205 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10; 211 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk > max_pix_clk) 212 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_sym_clk; 215 return max_pix_clk; 225 int max_pix_clk = get_max_pixel_clock_for_all_paths(context); local in function:dce_get_required_clocks_state 234 || max_pix_clk > 760 int max_pix_clk = get_max_pixel_clock_for_all_paths(context); local in function:dce12_update_clocks 782 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr->clks.phyclk_khz))     [all...]
dce_clk_mgr.c	191 uint32_t max_pix_clk = 0; local in function:get_max_pixel_clock_for_all_paths 204 if (pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10 > max_pix_clk) 205 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_pix_clk_100hz / 10; 211 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk > max_pix_clk) 212 max_pix_clk = pipe_ctx->stream_res.pix_clk_params.requested_sym_clk; 215 return max_pix_clk; 225 int max_pix_clk = get_max_pixel_clock_for_all_paths(context); local in function:dce_get_required_clocks_state 234 || max_pix_clk > 760 int max_pix_clk = get_max_pixel_clock_for_all_paths(context); local in function:dce12_update_clocks 782 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr->clks.phyclk_khz))     [all...]
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_link.c	2291 uint32_t max_pix_clk = stream->link->dongle_max_pix_clk * 10; local in function:dc_link_validate_mode_timing 2301 if (max_pix_clk != 0 && get_timing_pixel_clock_100hz(timing) > max_pix_clk)
amdgpu_dc_link.c	2291 uint32_t max_pix_clk = stream->link->dongle_max_pix_clk * 10; local in function:dc_link_validate_mode_timing 2301 if (max_pix_clk != 0 && get_timing_pixel_clock_100hz(timing) > max_pix_clk)

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Indexes created Fri Sep 26 20:09:58 GMT 2025