| /src/sys/arch/bebox/stand/boot/ |
| ns16550.h | 43 unsigned char mcr; /* 4 */ member in struct:NS16550
|
| ns16550.h | 43 unsigned char mcr; /* 4 */ member in struct:NS16550
|
| /src/sys/arch/prep/stand/boot/ |
| ns16550.h | 42 volatile unsigned char mcr; /* 4 */ member in struct:NS16550
|
| ns16550.h | 42 volatile unsigned char mcr; /* 4 */ member in struct:NS16550
|
| /src/sys/arch/rs6000/stand/boot/ |
| ns16550.h | 42 volatile unsigned char mcr; /* 4 */ member in struct:NS16550
|
| ns16550.h | 42 volatile unsigned char mcr; /* 4 */ member in struct:NS16550
|
| /src/sys/arch/vax/vax/ |
| ka750.c | 158 #define M750_INH(mcr) ((mcr)->mc_inh = 0)
159 #define M750_ENA(mcr) ((mcr)->mc_err = (M750_UNCORR|M750_CORERR), \
160 (mcr)->mc_inh = M750_ICRD)
161 #define M750_ERR(mcr) ((mcr)->mc_err & (M750_UNCORR|M750_CORERR))
171 struct mcr750 * const mcr = (struct mcr750 *)sa->sa_ioh; local in function:ka750_memenable
177 cardinfo = mcr->mc_inf;
221 struct mcr750 * const mcr = (struct mcr750 *)mcraddr[0] local in function:ka750_memerr
[all...] |
| ka780.c | 137 #define M780C_INH(mcr) \
138 ((mcr)->mc_reg[2] = (M780_ICRD|M780_HIER|M780_ERLOG)); \
140 #define M780C_ENA(mcr) \
141 ((mcr)->mc_reg[2] = (M780_HIER|M780_ERLOG)); mtpr(3<<14, PR_SBIER);
142 #define M780C_ERR(mcr) \
143 ((mcr)->mc_reg[2] & (M780_ERLOG))
145 #define M780C_SYN(mcr) ((mcr)->mc_reg[2] & 0xff)
146 #define M780C_ADDR(mcr) (((mcr)->mc_reg[2] >> 8) & 0xfffff
176 struct mcr780 * const mcr = (void *)sa->sa_ioh; \/* XXX *\/ local in function:mem_sbi_attach
257 struct mcr780 *mcr; local in function:ka780_memerr
[all...] |
| ka750.c | 158 #define M750_INH(mcr) ((mcr)->mc_inh = 0)
159 #define M750_ENA(mcr) ((mcr)->mc_err = (M750_UNCORR|M750_CORERR), \
160 (mcr)->mc_inh = M750_ICRD)
161 #define M750_ERR(mcr) ((mcr)->mc_err & (M750_UNCORR|M750_CORERR))
171 struct mcr750 * const mcr = (struct mcr750 *)sa->sa_ioh; local in function:ka750_memenable
177 cardinfo = mcr->mc_inf;
221 struct mcr750 * const mcr = (struct mcr750 *)mcraddr[0] local in function:ka750_memerr
[all...] |
| ka780.c | 137 #define M780C_INH(mcr) \
138 ((mcr)->mc_reg[2] = (M780_ICRD|M780_HIER|M780_ERLOG)); \
140 #define M780C_ENA(mcr) \
141 ((mcr)->mc_reg[2] = (M780_HIER|M780_ERLOG)); mtpr(3<<14, PR_SBIER);
142 #define M780C_ERR(mcr) \
143 ((mcr)->mc_reg[2] & (M780_ERLOG))
145 #define M780C_SYN(mcr) ((mcr)->mc_reg[2] & 0xff)
146 #define M780C_ADDR(mcr) (((mcr)->mc_reg[2] >> 8) & 0xfffff
176 struct mcr780 * const mcr = (void *)sa->sa_ioh; \/* XXX *\/ local in function:mem_sbi_attach
257 struct mcr780 *mcr; local in function:ka780_memerr
[all...] |
| /src/sys/dev/isa/ |
| if_ntwoc_isa.c | 479 /* reset mcr */
695 u_int16_t mcr; local in function:ntwoc_isa_shutdown
705 mcr = bus_space_read_1(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, NTWOC_MCR);
706 mcr |= (NTWOC_MCR_DTR0 | NTWOC_MCR_DTR1);
707 bus_space_write_1(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, NTWOC_MCR, mcr);
717 u_int8_t mcr; local in function:ntwoc_isa_dtr_callback
719 mcr = bus_space_read_1(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, NTWOC_MCR);
721 NTWO_DPRINTF(("port == %d, state == %d, old mcr: 0x%02x\n",
722 port, state, mcr));
726 mcr |= NTWOC_MCR_DTR0
745 u_int8_t mcr; local in function:ntwoc_isa_clock_callback
[all...] |
| if_ntwoc_isa.c | 479 /* reset mcr */
695 u_int16_t mcr; local in function:ntwoc_isa_shutdown
705 mcr = bus_space_read_1(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, NTWOC_MCR);
706 mcr |= (NTWOC_MCR_DTR0 | NTWOC_MCR_DTR1);
707 bus_space_write_1(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, NTWOC_MCR, mcr);
717 u_int8_t mcr; local in function:ntwoc_isa_dtr_callback
719 mcr = bus_space_read_1(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, NTWOC_MCR);
721 NTWO_DPRINTF(("port == %d, state == %d, old mcr: 0x%02x\n",
722 port, state, mcr));
726 mcr |= NTWOC_MCR_DTR0
745 u_int8_t mcr; local in function:ntwoc_isa_clock_callback
[all...] |
| /src/sys/dev/sbus/ |
| spif.c | 846 uint8_t channel, mcr; local in function:spif_stcintr_mx
850 mcr = STC_READ(sc, STC_MCR);
851 if (mcr & CD180_MCR_CD) {
|
| spif.c | 846 uint8_t channel, mcr; local in function:spif_stcintr_mx
850 mcr = STC_READ(sc, STC_MCR);
851 if (mcr & CD180_MCR_CD) {
|
| /src/sys/dev/usb/ |
| umcs.c | 616 uint8_t mcr = sc->sc_ports[portno].sc_port_mcr; local in function:umcs7840_param
656 mcr |= MCS7840_UART_MCR_CTSRTS;
658 mcr &= ~MCS7840_UART_MCR_CTSRTS;
661 mcr &= ~MCS7840_UART_MCR_DTRDSR;
663 mcr |= MCS7840_UART_MCR_DTRDSR;
669 sc->sc_ports[portno].sc_port_mcr = mcr;
683 uint8_t mcr = sc->sc_ports[portno].sc_port_mcr; local in function:umcs7840_dtr
686 mcr |= MCS7840_UART_MCR_DTR;
688 mcr &= ~MCS7840_UART_MCR_DTR;
690 sc->sc_ports[portno].sc_port_mcr = mcr;
699 uint8_t mcr = sc->sc_ports[portno].sc_port_mcr; local in function:umcs7840_rts
[all...] |
| umcs.c | 616 uint8_t mcr = sc->sc_ports[portno].sc_port_mcr; local in function:umcs7840_param
656 mcr |= MCS7840_UART_MCR_CTSRTS;
658 mcr &= ~MCS7840_UART_MCR_CTSRTS;
661 mcr &= ~MCS7840_UART_MCR_DTRDSR;
663 mcr |= MCS7840_UART_MCR_DTRDSR;
669 sc->sc_ports[portno].sc_port_mcr = mcr;
683 uint8_t mcr = sc->sc_ports[portno].sc_port_mcr; local in function:umcs7840_dtr
686 mcr |= MCS7840_UART_MCR_DTR;
688 mcr &= ~MCS7840_UART_MCR_DTR;
690 sc->sc_ports[portno].sc_port_mcr = mcr;
699 uint8_t mcr = sc->sc_ports[portno].sc_port_mcr; local in function:umcs7840_rts
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_workarounds.c | 788 u32 l3_en, mcr, mcr_mask; local in function:wa_init_mcr
795 * the case, we might need to program MCR select to a valid L3Bank
800 * Before any MMIO read into slice/subslice specific registers, MCR
842 mcr = GEN11_MCR_SLICE(slice) | GEN11_MCR_SUBSLICE(subslice);
845 mcr = GEN8_MCR_SLICE(slice) | GEN8_MCR_SUBSLICE(subslice);
849 DRM_DEBUG_DRIVER("MCR slice/subslice = %x\n", mcr);
851 wa_write_masked_or(wal, GEN8_MCR_SELECTOR, mcr_mask, mcr);
1547 * Registers in this range are affected by the MCR selector
|
| intel_workarounds.c | 788 u32 l3_en, mcr, mcr_mask; local in function:wa_init_mcr
795 * the case, we might need to program MCR select to a valid L3Bank
800 * Before any MMIO read into slice/subslice specific registers, MCR
842 mcr = GEN11_MCR_SLICE(slice) | GEN11_MCR_SUBSLICE(subslice);
845 mcr = GEN8_MCR_SLICE(slice) | GEN8_MCR_SUBSLICE(subslice);
849 DRM_DEBUG_DRIVER("MCR slice/subslice = %x\n", mcr);
851 wa_write_masked_or(wal, GEN8_MCR_SELECTOR, mcr_mask, mcr);
1547 * Registers in this range are affected by the MCR selector
|
| intel_engine_cs.c | 932 u32 mcr_mask, mcr_ss, mcr, old_mcr, val; local in function:read_subslice_reg
952 old_mcr = mcr = intel_uncore_read_fw(uncore, GEN8_MCR_SELECTOR);
954 mcr &= ~mcr_mask;
955 mcr |= mcr_ss;
956 intel_uncore_write_fw(uncore, GEN8_MCR_SELECTOR, mcr);
960 mcr &= ~mcr_mask;
961 mcr |= old_mcr & mcr_mask;
963 intel_uncore_write_fw(uncore, GEN8_MCR_SELECTOR, mcr);
|
| /src/sys/arch/amiga/dev/ |
| if_esreg.h | 39 volatile u_short mcr; /* Memory Configuration Register */ member in struct:smcregs::__anonf052b2be0108
|
| if_esreg.h | 39 volatile u_short mcr; /* Memory Configuration Register */ member in struct:smcregs::__anonf052b2be0108
|
| /src/sys/arch/zaurus/zaurus/ |
| machdep.c | 577 uint16_t mcr, cdr, csr, cpr, ccr, irr, irm, imr, isr; local in function:hw_isc1000
580 mcr = ioreg16_read(baseaddr + SCOOP_MCR);
593 if (mcr == 0 && cdr == 0 && csr == 0 && cpr == 0 && ccr == 0 &&
|
| machdep.c | 577 uint16_t mcr, cdr, csr, cpr, ccr, irr, irm, imr, isr; local in function:hw_isc1000
580 mcr = ioreg16_read(baseaddr + SCOOP_MCR);
593 if (mcr == 0 && cdr == 0 && csr == 0 && cpr == 0 && ccr == 0 &&
|
| /src/sys/dev/pci/ |
| if_vte.c | 871 uint16_t mcr; local in function:vte_mac_config
873 mcr = CSR_READ_2(sc, VTE_MCR0);
874 mcr &= ~(MCR0_FC_ENB | MCR0_FULL_DUPLEX);
876 mcr |= MCR0_FULL_DUPLEX;
879 mcr |= MCR0_FC_ENB;
887 mcr |= MCR0_FC_ENB;
890 CSR_WRITE_2(sc, VTE_MCR0, mcr);
1208 uint16_t mcr, mdcsc; local in function:vte_reset
1212 mcr = CSR_READ_2(sc, VTE_MCR1);
1213 CSR_WRITE_2(sc, VTE_MCR1, mcr | MCR1_MAC_RESET)
1447 uint16_t mcr; local in function:vte_start_mac
1474 uint16_t mcr; local in function:vte_stop_mac
1585 uint16_t mchash[4], mcr; local in function:vte_rxfilter
[all...] |
| if_vte.c | 871 uint16_t mcr; local in function:vte_mac_config
873 mcr = CSR_READ_2(sc, VTE_MCR0);
874 mcr &= ~(MCR0_FC_ENB | MCR0_FULL_DUPLEX);
876 mcr |= MCR0_FULL_DUPLEX;
879 mcr |= MCR0_FC_ENB;
887 mcr |= MCR0_FC_ENB;
890 CSR_WRITE_2(sc, VTE_MCR0, mcr);
1208 uint16_t mcr, mdcsc; local in function:vte_reset
1212 mcr = CSR_READ_2(sc, VTE_MCR1);
1213 CSR_WRITE_2(sc, VTE_MCR1, mcr | MCR1_MAC_RESET)
1447 uint16_t mcr; local in function:vte_start_mac
1474 uint16_t mcr; local in function:vte_stop_mac
1585 uint16_t mchash[4], mcr; local in function:vte_rxfilter
[all...] |
