/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
amdgpu_navi10_ppt.c | 996 uint32_t min_sclk_freq = 0, min_mclk_freq = 0; local in function:navi10_populate_umd_state_clk 998 ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq, NULL, false); 1002 smu->pstate_sclk = min_sclk_freq * 100;
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amdgpu_navi10_ppt.c | 996 uint32_t min_sclk_freq = 0, min_mclk_freq = 0; local in function:navi10_populate_umd_state_clk 998 ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq, NULL, false); 1002 smu->pstate_sclk = min_sclk_freq * 100;
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amdgpu_navi10_ppt.c | 996 uint32_t min_sclk_freq = 0, min_mclk_freq = 0; local in function:navi10_populate_umd_state_clk 998 ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq, NULL, false); 1002 smu->pstate_sclk = min_sclk_freq * 100;
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amdgpu_navi10_ppt.c | 996 uint32_t min_sclk_freq = 0, min_mclk_freq = 0; local in function:navi10_populate_umd_state_clk 998 ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq, NULL, false); 1002 smu->pstate_sclk = min_sclk_freq * 100;
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amdgpu_navi10_ppt.c | 996 uint32_t min_sclk_freq = 0, min_mclk_freq = 0; local in function:navi10_populate_umd_state_clk 998 ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq, NULL, false); 1002 smu->pstate_sclk = min_sclk_freq * 100;
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amdgpu_navi10_ppt.c | 996 uint32_t min_sclk_freq = 0, min_mclk_freq = 0; local in function:navi10_populate_umd_state_clk 998 ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq, NULL, false); 1002 smu->pstate_sclk = min_sclk_freq * 100;
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