| /src/sys/arch/powerpc/pic/ |
| ipi.c | 61 int msr; local in function:ipi_intr
86 msr = (mfmsr() & ~PSL_EE) | PSL_POW;
89 mtmsr(msr);
|
| ipi.c | 61 int msr; local in function:ipi_intr
86 msr = (mfmsr() & ~PSL_EE) | PSL_POW;
89 mtmsr(msr);
|
| /src/sys/arch/rs6000/stand/boot/ |
| io.c | 18 register_t savemsr, msr; local in function:setup_iocc
21 msr = savemsr & ~PSL_DR;
22 __asm volatile ("mtmsr %0" : : "r"(msr));
25 __asm volatile ("mtmsr %0" : : "r"(msr|PSL_DR));
|
| io.c | 18 register_t savemsr, msr; local in function:setup_iocc
21 msr = savemsr & ~PSL_DR;
22 __asm volatile ("mtmsr %0" : : "r"(msr));
25 __asm volatile ("mtmsr %0" : : "r"(msr|PSL_DR));
|
| /src/sys/arch/x86/include/ |
| cpu_msr.h | 47 uint64_t msr = 0; local in function:x86_msr_xcall
51 /* Read the MSR requested and apply the mask if defined. */
53 msr = rdmsr(msrdat->msr_type);
55 msr &= ~msrdat->msr_mask;
59 msr |= msrdat->msr_value;
60 wrmsr(msrdat->msr_type, msr);
|
| cpu_msr.h | 47 uint64_t msr = 0; local in function:x86_msr_xcall
51 /* Read the MSR requested and apply the mask if defined. */
53 msr = rdmsr(msrdat->msr_type);
55 msr &= ~msrdat->msr_mask;
59 msr |= msrdat->msr_value;
60 wrmsr(msrdat->msr_type, msr);
|
| /src/sys/arch/powerpc/ibm4xx/ |
| copyinstr.c | 51 int rv, msr, pid, tmp, ctx; local in function:copyinstr
76 "mfmsr %[msr];" /* Save MSR */
78 "andc %[tmp],%[msr],%[tmp];"
97 "mtmsr %[msr];" /* Restore MSR */
101 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp),
|
| copyoutstr.c | 51 int rv, msr, pid, tmp, ctx; local in function:copyoutstr
76 "mfmsr %[msr];" /* Save MSR */
78 "andc %[tmp],%[msr],%[tmp];"
98 "mtmsr %[msr];" /* Restore MSR */
102 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp),
|
| copyinstr.c | 51 int rv, msr, pid, tmp, ctx; local in function:copyinstr
76 "mfmsr %[msr];" /* Save MSR */
78 "andc %[tmp],%[msr],%[tmp];"
97 "mtmsr %[msr];" /* Restore MSR */
101 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp),
|
| copyoutstr.c | 51 int rv, msr, pid, tmp, ctx; local in function:copyoutstr
76 "mfmsr %[msr];" /* Save MSR */
78 "andc %[tmp],%[msr],%[tmp];"
98 "mtmsr %[msr];" /* Restore MSR */
102 : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp),
|
| /src/sys/arch/x86/x86/ |
| intel_busclock.c | 50 uint64_t msr; local in function:via_get_bus_clock
53 msr = rdmsr(MSR_EBL_CR_POWERON);
54 bus = (msr >> 18) & 0x3;
78 uint64_t msr; local in function:viac7_get_bus_clock
81 msr = rdmsr(MSR_PERF_STATUS);
82 mult = (msr >> 8) & 0xff;
93 uint64_t msr; local in function:p3_get_bus_clock
108 if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
113 bus = (msr >> 0) & 0x7;
125 if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT)
333 uint64_t msr; local in function:p4_get_bus_clock
[all...] |
| intel_busclock.c | 50 uint64_t msr; local in function:via_get_bus_clock
53 msr = rdmsr(MSR_EBL_CR_POWERON);
54 bus = (msr >> 18) & 0x3;
78 uint64_t msr; local in function:viac7_get_bus_clock
81 msr = rdmsr(MSR_PERF_STATUS);
82 mult = (msr >> 8) & 0xff;
93 uint64_t msr; local in function:p3_get_bus_clock
108 if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
113 bus = (msr >> 0) & 0x7;
125 if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT)
333 uint64_t msr; local in function:p4_get_bus_clock
[all...] |
| /src/lib/libc/arch/powerpc/gen/ |
| fpsetmask.c | 54 uint32_t msr; local in function:__weak_alias
56 __asm volatile ("mfmsr %0" : "=r"(msr));
57 return msr;
61 mtmsr(uint32_t msr)
64 __asm volatile ("mtmsr %0" : : "r"(msr));
77 uint32_t msr; local in function:fpsetmask
86 msr = mfmsr();
87 msr = (msr & ~(PSL_FE0 | PSL_FE1)) |
89 mtmsr(msr);
[all...] |
| fpsetmask.c | 54 uint32_t msr; local in function:__weak_alias
56 __asm volatile ("mfmsr %0" : "=r"(msr));
57 return msr;
61 mtmsr(uint32_t msr)
64 __asm volatile ("mtmsr %0" : : "r"(msr));
77 uint32_t msr; local in function:fpsetmask
86 msr = mfmsr();
87 msr = (msr & ~(PSL_FE0 | PSL_FE1)) |
89 mtmsr(msr);
[all...] |
| /src/sys/dev/mii/ |
| urlphy.c | 229 uint16_t msr, bmsr, bmcr; local in function:urlphy_status
238 * so we need to read the MSR register to get link status.
240 PHY_READ(sc, URLPHY_MSR, &msr);
241 PHY_READ(sc, URLPHY_MSR, &msr);
242 if (msr & URLPHY_MSR_LINK)
258 if (msr & URLPHY_MSR_SPEED_100)
263 if (msr & URLPHY_MSR_DUPLEX)
|
| urlphy.c | 229 uint16_t msr, bmsr, bmcr; local in function:urlphy_status
238 * so we need to read the MSR register to get link status.
240 PHY_READ(sc, URLPHY_MSR, &msr);
241 PHY_READ(sc, URLPHY_MSR, &msr);
242 if (msr & URLPHY_MSR_LINK)
258 if (msr & URLPHY_MSR_SPEED_100)
263 if (msr & URLPHY_MSR_DUPLEX)
|
| /src/sys/arch/powerpc/powerpc/ |
| kgdb_machdep.c | 86 u_int msr; local in function:kgdb_acc
95 __asm volatile ("mfmsr %0" : "=r"(msr));
96 if ((msr & PSL_DR) == 0) {
127 if (BAT_VALID_P(batu,msr) &&
133 if (BAT_VALID_P(batu,msr) &&
139 if (BAT_VALID_P(batu,msr) &&
145 if (BAT_VALID_P(batu,msr) &&
264 gdb_regs[KGDB_PPC_MSR_REG] = regs->msr;
281 regs->msr = gdb_regs[KGDB_PPC_MSR_REG];
|
| kgdb_machdep.c | 86 u_int msr; local in function:kgdb_acc
95 __asm volatile ("mfmsr %0" : "=r"(msr));
96 if ((msr & PSL_DR) == 0) {
127 if (BAT_VALID_P(batu,msr) &&
133 if (BAT_VALID_P(batu,msr) &&
139 if (BAT_VALID_P(batu,msr) &&
145 if (BAT_VALID_P(batu,msr) &&
264 gdb_regs[KGDB_PPC_MSR_REG] = regs->msr;
281 regs->msr = gdb_regs[KGDB_PPC_MSR_REG];
|
| /src/sys/arch/powerpc/booke/ |
| spe.c | 90 const register_t msr = mfmsr(); local in function:vec_state_load
91 mtmsr((msr & ~PSL_EE) | PSL_SPV);
102 * Restore MSR (turn off SPE)
104 mtmsr(msr);
121 const register_t msr = mfmsr(); local in function:vec_state_save
122 mtmsr((msr & ~PSL_EE) | PSL_SPV);
132 * Restore MSR (turn off SPE)
134 mtmsr(msr);
|
| spe.c | 90 const register_t msr = mfmsr(); local in function:vec_state_load
91 mtmsr((msr & ~PSL_EE) | PSL_SPV);
102 * Restore MSR (turn off SPE)
104 mtmsr(msr);
121 const register_t msr = mfmsr(); local in function:vec_state_save
122 mtmsr((msr & ~PSL_EE) | PSL_SPV);
132 * Restore MSR (turn off SPE)
134 mtmsr(msr);
|
| /src/sys/arch/ibmnws/ibmnws/ |
| machdep.c | 182 int msr; local in function:cpu_startup
186 : "=r"(msr) : "K"(PSL_EE));
239 int msr; local in function:cpu_reboot
242 __asm volatile("mfmsr %0" : "=r"(msr));
243 msr |= PSL_IP;
244 __asm volatile("mtmsr %0" :: "r"(msr));
|
| machdep.c | 182 int msr; local in function:cpu_startup
186 : "=r"(msr) : "K"(PSL_EE));
239 int msr; local in function:cpu_reboot
242 __asm volatile("mfmsr %0" : "=r"(msr));
243 msr |= PSL_IP;
244 __asm volatile("mtmsr %0" :: "r"(msr));
|
| /src/sys/arch/mvmeppc/mvmeppc/ |
| machdep.c | 181 int msr; local in function:cpu_startup
185 : "=r"(msr) : "K"(PSL_EE));
|
| machdep.c | 181 int msr; local in function:cpu_startup
185 : "=r"(msr) : "K"(PSL_EE));
|
| /src/sys/arch/powerpc/oea/ |
| altivec.c | 87 const register_t msr = mfmsr(); local in function:vec_state_load
88 mtmsr((msr & ~PSL_EE) | PSL_VEC);
98 * Restore MSR (turn off AltiVec)
100 mtmsr(msr);
124 const register_t msr = mfmsr(); local in function:vec_state_save
125 mtmsr((msr & ~PSL_EE) | PSL_VEC);
145 * Restore MSR (turn off AltiVec)
147 mtmsr(msr);
216 register_t omsr, msr; local in function:vzeropage
223 msr = (omsr & ~PSL_EE) | PSL_VEC
276 register_t omsr, msr; local in function:vcopypage
[all...] |
