/src/sys/arch/arm/rockchip/ |
rk3328_iomux.c | 109 u_int nbanks; member in struct:rk3328_iomux_conf 114 .nbanks = __arraycount(rk3328_iomux_banks), 149 KASSERT(bank < sc->sc_conf->nbanks);
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rk3328_iomux.c | 109 u_int nbanks; member in struct:rk3328_iomux_conf 114 .nbanks = __arraycount(rk3328_iomux_banks), 149 KASSERT(bank < sc->sc_conf->nbanks);
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rk3399_iomux.c | 176 u_int nbanks; member in struct:rk3399_iomux_conf 181 .nbanks = __arraycount(rk3399_iomux_banks), 218 KASSERT(bank < sc->sc_conf->nbanks); 272 KASSERT(bank < sc->sc_conf->nbanks); 362 KASSERT(bank < sc->sc_conf->nbanks);
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rk3399_iomux.c | 176 u_int nbanks; member in struct:rk3399_iomux_conf 181 .nbanks = __arraycount(rk3399_iomux_banks), 218 KASSERT(bank < sc->sc_conf->nbanks); 272 KASSERT(bank < sc->sc_conf->nbanks); 362 KASSERT(bank < sc->sc_conf->nbanks);
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/src/sys/external/bsd/drm2/dist/drm/radeon/ |
radeon_evergreen_cs.c | 53 u32 nbanks; member in struct:evergreen_cs_track 112 static u32 evergreen_cs_get_num_banks(u32 nbanks) 114 switch (nbanks) { 185 unsigned nbanks; member in struct:eg_surface 279 halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; 347 switch (surf->nbanks) { 348 case 0: surf->nbanks = 2; break; 349 case 1: surf->nbanks = 4; break; 350 case 2: surf->nbanks = 8; break; 351 case 3: surf->nbanks = 16; break [all...] |
radeon_evergreen_cs.c | 53 u32 nbanks; member in struct:evergreen_cs_track 112 static u32 evergreen_cs_get_num_banks(u32 nbanks) 114 switch (nbanks) { 185 unsigned nbanks; member in struct:eg_surface 279 halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; 347 switch (surf->nbanks) { 348 case 0: surf->nbanks = 2; break; 349 case 1: surf->nbanks = 4; break; 350 case 2: surf->nbanks = 8; break; 351 case 3: surf->nbanks = 16; break [all...] |
radeon_r600_cs.c | 41 extern void r600_cs_legacy_get_tiling_conf(struct drm_device *dev, u32 *npipes, u32 *nbanks, u32 *group_size); 47 u32 nbanks; member in struct:r600_cs_track 247 u32 nbanks; member in struct:array_mode_checker 262 u32 macro_tile_width = values->nbanks; 291 (u32)((values->group_size * values->nbanks) / 387 array_check.nbanks = track->nbanks; 582 array_check.nbanks = track->nbanks; 1520 array_check.nbanks = track->nbanks [all...] |
radeon_r600_cs.c | 41 extern void r600_cs_legacy_get_tiling_conf(struct drm_device *dev, u32 *npipes, u32 *nbanks, u32 *group_size); 47 u32 nbanks; member in struct:r600_cs_track 247 u32 nbanks; member in struct:array_mode_checker 262 u32 macro_tile_width = values->nbanks; 291 (u32)((values->group_size * values->nbanks) / 387 array_check.nbanks = track->nbanks; 582 array_check.nbanks = track->nbanks; 1520 array_check.nbanks = track->nbanks [all...] |