| /src/sys/arch/arm/amlogic/ |
| meson8b_clkc.c | 126 u_int new_div = 1; local in function:meson8b_clkc_pll_sys_set_rate
153 cntl |= __SHIFTIN(new_div, HHI_SYS_PLL_CNTL_DIV);
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| meson8b_clkc.c | 126 u_int new_div = 1; local in function:meson8b_clkc_pll_sys_set_rate
153 cntl |= __SHIFTIN(new_div, HHI_SYS_PLL_CNTL_DIV);
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| mesong12_clkc.c | 1319 int new_m, new_n, new_div, i, error; local in function:mesong12_cpuclk_set_rate
1337 new_div = 7;
1339 new_m = (uint64_t)rate * (1 << new_div) / xtal_clock;
1340 while (new_m >= 250 && (new_div > 0)) {
1341 new_div--;
1379 val |= __SHIFTIN(new_div, __BITS(18,16));
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| mesong12_clkc.c | 1319 int new_m, new_n, new_div, i, error; local in function:mesong12_cpuclk_set_rate
1337 new_div = 7;
1339 new_m = (uint64_t)rate * (1 << new_div) / xtal_clock;
1340 while (new_m >= 250 && (new_div > 0)) {
1341 new_div--;
1379 val |= __SHIFTIN(new_div, __BITS(18,16));
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| /src/sys/arch/arm/samsung/ |
| exynos5410_clock.c | 669 int tmp_div, new_div = -1; local in function:exynos5410_clock_set_rate_div
680 new_div = tmp_div;
684 if (new_div == -1)
689 v |= __SHIFTIN(new_div, ediv->bits);
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| exynos5422_clock.c | 846 int tmp_div, new_div = -1; local in function:exynos5422_clock_set_rate_div
857 new_div = tmp_div;
861 if (new_div == -1)
866 v |= __SHIFTIN(new_div, ediv->bits);
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| exynos5410_clock.c | 669 int tmp_div, new_div = -1; local in function:exynos5410_clock_set_rate_div
680 new_div = tmp_div;
684 if (new_div == -1)
689 v |= __SHIFTIN(new_div, ediv->bits);
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| exynos5422_clock.c | 846 int tmp_div, new_div = -1; local in function:exynos5422_clock_set_rate_div
857 new_div = tmp_div;
861 if (new_div == -1)
866 v |= __SHIFTIN(new_div, ediv->bits);
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