| /src/sys/dev/pci/igc/ |
| igc_base.c | 19 * igc_acquire_phy_base - Acquire rights to access PHY
22 * Acquire access rights to the correct PHY.
38 * igc_release_phy_base - Release rights to access PHY
41 * A wrapper to release access rights to the correct PHY.
98 * igc_power_down_phy_copper_base - Remove link during PHY power down
101 * In the case of a PHY power down to save power, or to turn off link during a
107 struct igc_phy_info *phy = &hw->phy; local
109 if (!(phy->ops.check_reset_block))
113 if (phy->ops.check_reset_block(hw)
[all...] |
| igc_base.c | 19 * igc_acquire_phy_base - Acquire rights to access PHY
22 * Acquire access rights to the correct PHY.
38 * igc_release_phy_base - Release rights to access PHY
41 * A wrapper to release access rights to the correct PHY.
98 * igc_power_down_phy_copper_base - Remove link during PHY power down
101 * In the case of a PHY power down to save power, or to turn off link during a
107 struct igc_phy_info *phy = &hw->phy; local
109 if (!(phy->ops.check_reset_block))
113 if (phy->ops.check_reset_block(hw)
[all...] |
| /src/sys/arch/arm/samsung/ |
| exynos_ehci.c | 74 struct fdtbus_phy *phy; local
96 phy = fdtbus_phy_get_index(child, 0);
97 if (phy && fdtbus_phy_enable(phy, true) != 0)
98 aprint_error(": couldn't enable phy for %s\n",
|
| exynos_ohci.c | 74 struct fdtbus_phy *phy; local
96 phy = fdtbus_phy_get_index(child, 0);
97 if (phy && fdtbus_phy_enable(phy, true) != 0)
98 aprint_error(": couldn't enable phy for %s\n",
|
| exynos_ehci.c | 74 struct fdtbus_phy *phy; local
96 phy = fdtbus_phy_get_index(child, 0);
97 if (phy && fdtbus_phy_enable(phy, true) != 0)
98 aprint_error(": couldn't enable phy for %s\n",
|
| exynos_ohci.c | 74 struct fdtbus_phy *phy; local
96 phy = fdtbus_phy_get_index(child, 0);
97 if (phy && fdtbus_phy_enable(phy, true) != 0)
98 aprint_error(": couldn't enable phy for %s\n",
|
| /src/sys/arch/arm/ti/ |
| ti_ehci.c | 77 struct fdtbus_phy *phy; local
124 phy = fdtbus_phy_get_index(phandle, n);
125 if (phy && fdtbus_phy_enable(phy, true) != 0) {
126 aprint_error(": couldn't enable phy\n");
|
| ti_ehci.c | 77 struct fdtbus_phy *phy; local
124 phy = fdtbus_phy_get_index(phandle, n);
125 if (phy && fdtbus_phy_enable(phy, true) != 0) {
126 aprint_error(": couldn't enable phy\n");
|
| ti_omapmusb.c | 172 struct fdtbus_phy *phy; local
192 phy = fdtbus_phy_get(phandle, "usb2-phy");
193 if (phy && fdtbus_phy_enable(phy, true) != 0) {
194 aprint_error(": couldn't enable phy\n");
|
| ti_omapmusb.c | 172 struct fdtbus_phy *phy; local
192 phy = fdtbus_phy_get(phandle, "usb2-phy");
193 if (phy && fdtbus_phy_enable(phy, true) != 0) {
194 aprint_error(": couldn't enable phy\n");
|
| /src/sys/dev/fdt/ |
| ehci_fdt.c | 75 struct fdtbus_phy *phy; local
102 /* Enable optional phy */
103 phy = fdtbus_phy_get(phandle, "usb");
104 if (phy && fdtbus_phy_enable(phy, true) != 0) {
105 aprint_error(": couldn't enable phy\n");
|
| ohci_fdt.c | 75 struct fdtbus_phy *phy; local
102 /* Enable optional phy */
103 phy = fdtbus_phy_get(phandle, "usb");
104 if (phy && fdtbus_phy_enable(phy, true) != 0) {
105 aprint_error(": couldn't enable phy\n");
|
| ehci_fdt.c | 75 struct fdtbus_phy *phy; local
102 /* Enable optional phy */
103 phy = fdtbus_phy_get(phandle, "usb");
104 if (phy && fdtbus_phy_enable(phy, true) != 0) {
105 aprint_error(": couldn't enable phy\n");
|
| ohci_fdt.c | 75 struct fdtbus_phy *phy; local
102 /* Enable optional phy */
103 phy = fdtbus_phy_get(phandle, "usb");
104 if (phy && fdtbus_phy_enable(phy, true) != 0) {
105 aprint_error(": couldn't enable phy\n");
|
| dwc2_fdt.c | 120 struct fdtbus_phy *phy; local
143 /* Enable optional phy */
144 phy = fdtbus_phy_get(phandle, "usb2-phy");
145 if (phy && fdtbus_phy_enable(phy, true) != 0) {
146 aprint_error(": couldn't enable phy\n");
|
| fdt_phy.c | 84 struct fdtbus_phy *phy = NULL; local
109 if (of_getprop_uint32(pc_phandle, "#phy-cells", &phy_cells))
118 phy = kmem_alloc(sizeof(*phy), KM_SLEEP);
119 phy->phy_pc = pc;
120 phy->phy_priv = phy_priv;
133 return phy;
142 err = fdtbus_get_index(phandle, "phy-names", phyname, &index);
150 fdtbus_phy_put(struct fdtbus_phy *phy)
152 struct fdtbus_phy_controller *pc = phy->phy_pc
[all...] |
| dwc2_fdt.c | 120 struct fdtbus_phy *phy; local
143 /* Enable optional phy */
144 phy = fdtbus_phy_get(phandle, "usb2-phy");
145 if (phy && fdtbus_phy_enable(phy, true) != 0) {
146 aprint_error(": couldn't enable phy\n");
|
| fdt_phy.c | 84 struct fdtbus_phy *phy = NULL; local
109 if (of_getprop_uint32(pc_phandle, "#phy-cells", &phy_cells))
118 phy = kmem_alloc(sizeof(*phy), KM_SLEEP);
119 phy->phy_pc = pc;
120 phy->phy_priv = phy_priv;
133 return phy;
142 err = fdtbus_get_index(phandle, "phy-names", phyname, &index);
150 fdtbus_phy_put(struct fdtbus_phy *phy)
152 struct fdtbus_phy_controller *pc = phy->phy_pc
[all...] |
| cdns3_fdt.c | 93 struct fdtbus_phy *phy; local
172 /* Enable PHY devices */
174 phy = fdtbus_phy_get_index(phandle, i);
175 if (phy == NULL)
177 if (fdtbus_phy_enable(phy, true) != 0)
178 aprint_error_dev(self, "couldn't enable phy #%d\n", i);
|
| cdns3_fdt.c | 93 struct fdtbus_phy *phy; local
172 /* Enable PHY devices */
174 phy = fdtbus_phy_get_index(phandle, i);
175 if (phy == NULL)
177 if (fdtbus_phy_enable(phy, true) != 0)
178 aprint_error_dev(self, "couldn't enable phy #%d\n", i);
|
| /src/sys/arch/hpcmips/vr/ |
| vrdmaau.c | 96 u_int32_t phy; local
101 if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
104 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAH_REG_W, phy >> 16);
105 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAL_REG_W, phy & 0xffff);
113 u_int32_t phy; local
118 if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
121 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAH_REG_W, phy >> 16);
122 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAL_REG_W, phy & 0xffff);
130 u_int32_t phy; local
135 if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
[all...] |
| vrdmaau.c | 96 u_int32_t phy; local
101 if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
104 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAH_REG_W, phy >> 16);
105 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAL_REG_W, phy & 0xffff);
113 u_int32_t phy; local
118 if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
121 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAH_REG_W, phy >> 16);
122 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAL_REG_W, phy & 0xffff);
130 u_int32_t phy; local
135 if ((err = vrdmaau_phy_addr(sc, addr, &phy)))
[all...] |
| /src/sys/arch/arm/sunxi/ |
| sunxi_musb.c | 308 struct fdtbus_phy *phy; local
342 /* Enable optional phy */
343 phy = fdtbus_phy_get(phandle, "usb");
344 if (phy && fdtbus_phy_enable(phy, true) != 0) {
345 aprint_error(": couldn't enable phy\n");
|
| sunxi_musb.c | 308 struct fdtbus_phy *phy; local
342 /* Enable optional phy */
343 phy = fdtbus_phy_get(phandle, "usb");
344 if (phy && fdtbus_phy_enable(phy, true) != 0) {
345 aprint_error(": couldn't enable phy\n");
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_combo_phy.c | 46 * CNL has just one set of registers, while gen11 has a set for each combo PHY.
47 * The CNL registers are equivalent to the gen11 PHY A registers, that's why we
51 cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)
56 val = I915_READ(ICL_PORT_COMP_DW3(phy));
82 enum phy phy)
87 procmon = cnl_get_procmon_ref_values(dev_priv, phy);
89 val = I915_READ(ICL_PORT_COMP_DW1(phy));
92 I915_WRITE(ICL_PORT_COMP_DW1(phy), val)
141 enum phy phy = PHY_A; local
299 enum phy phy; local
353 enum phy phy; local
[all...] |
