| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/ |
| nouveau_dispnv04_hw.c | 175 struct nvbios_pll pll_lim; local in function:nouveau_hw_get_pllvals
178 ret = nvbios_pll_parse(bios, plltype, &pll_lim);
179 if (ret || !(reg1 = pll_lim.reg))
204 pllvals->refclk = pll_lim.refclk;
267 struct nvbios_pll pll_lim; local in function:nouveau_hw_fix_bad_vpll
271 if (nvbios_pll_parse(bios, pll, &pll_lim))
275 if (pv.M1 >= pll_lim.vco1.min_m && pv.M1 <= pll_lim.vco1.max_m &&
276 pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n &
[all...] |
| nouveau_dispnv04_hw.c | 175 struct nvbios_pll pll_lim; local in function:nouveau_hw_get_pllvals
178 ret = nvbios_pll_parse(bios, plltype, &pll_lim);
179 if (ret || !(reg1 = pll_lim.reg))
204 pllvals->refclk = pll_lim.refclk;
267 struct nvbios_pll pll_lim; local in function:nouveau_hw_fix_bad_vpll
271 if (nvbios_pll_parse(bios, pll, &pll_lim))
275 if (pv.M1 >= pll_lim.vco1.min_m && pv.M1 <= pll_lim.vco1.max_m &&
276 pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n &
[all...] |
| nouveau_dispnv04_crtc.c | 127 struct nvbios_pll pll_lim; local in function:nv_crtc_calc_state_ext
130 &pll_lim))
146 if (drm->client.device.info.chipset > 0x40 && dot_clock <= (pll_lim.vco1.max_freq / 2))
147 memset(&pll_lim.vco2, 0, sizeof(pll_lim.vco2));
150 if (!clk->pll_calc(clk, &pll_lim, dot_clock, pv))
|
| nouveau_dispnv04_crtc.c | 127 struct nvbios_pll pll_lim; local in function:nv_crtc_calc_state_ext
130 &pll_lim))
146 if (drm->client.device.info.chipset > 0x40 && dot_clock <= (pll_lim.vco1.max_freq / 2))
147 memset(&pll_lim.vco2, 0, sizeof(pll_lim.vco2));
150 if (!clk->pll_calc(clk, &pll_lim, dot_clock, pv))
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