| /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/sophgo/ |
| sg2042.dtsi | 49 pllclk: clock-controller@70300100c0 { label in label:soc
68 clocks = <&pllclk MPLL_CLK>,
69 <&pllclk FPLL_CLK>,
70 <&pllclk DPLL0_CLK>,
71 <&pllclk DPLL1_CLK>;
|
| sg2042.dtsi | 49 pllclk: clock-controller@70300100c0 { label in label:soc
68 clocks = <&pllclk MPLL_CLK>,
69 <&pllclk FPLL_CLK>,
70 <&pllclk DPLL0_CLK>,
71 <&pllclk DPLL1_CLK>;
|
| /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/starfive/ |
| jh7110.dtsi | 886 <&pllclk JH7110_PLLCLK_PLL0_OUT>,
887 <&pllclk JH7110_PLLCLK_PLL1_OUT>,
888 <&pllclk JH7110_PLLCLK_PLL2_OUT>;
903 pllclk: clock-controller { label in label:sys_syscon
|
| jh7110.dtsi | 886 <&pllclk JH7110_PLLCLK_PLL0_OUT>,
887 <&pllclk JH7110_PLLCLK_PLL1_OUT>,
888 <&pllclk JH7110_PLLCLK_PLL2_OUT>;
903 pllclk: clock-controller { label in label:sys_syscon
|
