/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
amdgpu_vega12_processpptables.c | 71 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) 73 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 76 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 198 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) 205 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; 206 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; 214 if (le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]) > VEGA12_ENGINECLOCK_HARDMAX) 218 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]); 220 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]); 224 powerplay_table->ODSettingsMax 274 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table; local in function:vega12_pp_tables_initialize [all...] |
amdgpu_vega12_processpptables.c | 71 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) 73 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 76 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 198 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) 205 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; 206 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; 214 if (le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]) > VEGA12_ENGINECLOCK_HARDMAX) 218 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]); 220 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]); 224 powerplay_table->ODSettingsMax 274 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table; local in function:vega12_pp_tables_initialize [all...] |
amdgpu_vega12_processpptables.c | 71 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) 73 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 76 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 198 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) 205 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; 206 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; 214 if (le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]) > VEGA12_ENGINECLOCK_HARDMAX) 218 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]); 220 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]); 224 powerplay_table->ODSettingsMax 274 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table; local in function:vega12_pp_tables_initialize [all...] |
amdgpu_vega20_processpptables.c | 645 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) 647 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 650 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 653 if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) { 656 powerplay_table->smcPPTable.Version, 661 //dump_pptable(&powerplay_table->smcPPTable); 822 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) 830 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; 831 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; 833 hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table->smcPPTable.FanMaximumRpm 919 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table; local in function:vega20_pp_tables_initialize [all...] |
amdgpu_vega20_processpptables.c | 645 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) 647 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 650 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 653 if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) { 656 powerplay_table->smcPPTable.Version, 661 //dump_pptable(&powerplay_table->smcPPTable); 822 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) 830 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; 831 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; 833 hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table->smcPPTable.FanMaximumRpm 919 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table; local in function:vega20_pp_tables_initialize [all...] |
amdgpu_vega20_processpptables.c | 645 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) 647 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 650 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 653 if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) { 656 powerplay_table->smcPPTable.Version, 661 //dump_pptable(&powerplay_table->smcPPTable); 822 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) 830 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; 831 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; 833 hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table->smcPPTable.FanMaximumRpm 919 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table; local in function:vega20_pp_tables_initialize [all...] |
amdgpu_vega10_processpptables.c | 74 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) 78 state_arrays = (ATOM_Vega10_State_Array *)(((unsigned long)powerplay_table) + 79 le16_to_cpu(powerplay_table->usStateArrayOffset)); 81 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 84 PP_ASSERT_WITH_CODE(powerplay_table->usStateArrayOffset, 86 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 126 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) 135 (((unsigned long)powerplay_table) + 136 le16_to_cpu(powerplay_table->usThermalControllerOffset)); 138 PP_ASSERT_WITH_CODE((powerplay_table->usThermalControllerOffset != 0) 1190 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; local in function:vega10_pp_tables_initialize 1385 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; local in function:vega10_baco_set_cap [all...] |
amdgpu_vega10_processpptables.c | 74 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) 78 state_arrays = (ATOM_Vega10_State_Array *)(((unsigned long)powerplay_table) + 79 le16_to_cpu(powerplay_table->usStateArrayOffset)); 81 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 84 PP_ASSERT_WITH_CODE(powerplay_table->usStateArrayOffset, 86 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 126 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) 135 (((unsigned long)powerplay_table) + 136 le16_to_cpu(powerplay_table->usThermalControllerOffset)); 138 PP_ASSERT_WITH_CODE((powerplay_table->usThermalControllerOffset != 0) 1190 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; local in function:vega10_pp_tables_initialize 1385 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; local in function:vega10_baco_set_cap [all...] |
amdgpu_vega10_processpptables.c | 74 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) 78 state_arrays = (ATOM_Vega10_State_Array *)(((unsigned long)powerplay_table) + 79 le16_to_cpu(powerplay_table->usStateArrayOffset)); 81 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= 84 PP_ASSERT_WITH_CODE(powerplay_table->usStateArrayOffset, 86 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, 126 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) 135 (((unsigned long)powerplay_table) + 136 le16_to_cpu(powerplay_table->usThermalControllerOffset)); 138 PP_ASSERT_WITH_CODE((powerplay_table->usThermalControllerOffset != 0) 1190 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; local in function:vega10_pp_tables_initialize 1385 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; local in function:vega10_baco_set_cap [all...] |
amdgpu_process_pptables_v1_0.c | 249 * @param powerplay_table Pointer to the PowerPlay Table. 253 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table 263 le16_to_cpu(powerplay_table->usUlvVoltageOffset); 270 le16_to_cpu(powerplay_table->usPowerControlLimit); 286 if (0 != powerplay_table->usVddcLookupTableOffset) { 288 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + 289 le16_to_cpu(powerplay_table->usVddcLookupTableOffset)); 295 if (0 != powerplay_table->usVddgfxLookupTableOffset) { 297 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + 298 le16_to_cpu(powerplay_table->usVddgfxLookupTableOffset)) 1068 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table; local in function:pp_tables_v1_0_initialize [all...] |
amdgpu_process_pptables_v1_0.c | 249 * @param powerplay_table Pointer to the PowerPlay Table. 253 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table 263 le16_to_cpu(powerplay_table->usUlvVoltageOffset); 270 le16_to_cpu(powerplay_table->usPowerControlLimit); 286 if (0 != powerplay_table->usVddcLookupTableOffset) { 288 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + 289 le16_to_cpu(powerplay_table->usVddcLookupTableOffset)); 295 if (0 != powerplay_table->usVddgfxLookupTableOffset) { 297 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + 298 le16_to_cpu(powerplay_table->usVddgfxLookupTableOffset)) 1068 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table; local in function:pp_tables_v1_0_initialize [all...] |
amdgpu_process_pptables_v1_0.c | 249 * @param powerplay_table Pointer to the PowerPlay Table. 253 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table 263 le16_to_cpu(powerplay_table->usUlvVoltageOffset); 270 le16_to_cpu(powerplay_table->usPowerControlLimit); 286 if (0 != powerplay_table->usVddcLookupTableOffset) { 288 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + 289 le16_to_cpu(powerplay_table->usVddcLookupTableOffset)); 295 if (0 != powerplay_table->usVddgfxLookupTableOffset) { 297 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + 298 le16_to_cpu(powerplay_table->usVddgfxLookupTableOffset)) 1068 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table; local in function:pp_tables_v1_0_initialize [all...] |
amdgpu_processpptables.c | 54 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) 58 if (le16_to_cpu(powerplay_table->usTableSize) >= 61 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; 78 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) 81 powerplay_table); 90 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) 93 powerplay_table); 98 (((unsigned long) powerplay_table) + table_offset); 106 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) 109 powerplay_table); 874 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local in function:pp_tables_get_num_of_entries 899 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local in function:pp_tables_get_entry 1570 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local in function:get_vce_state_table_entry 1601 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table; local in function:pp_tables_initialize [all...] |
amdgpu_processpptables.c | 54 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) 58 if (le16_to_cpu(powerplay_table->usTableSize) >= 61 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; 78 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) 81 powerplay_table); 90 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) 93 powerplay_table); 98 (((unsigned long) powerplay_table) + table_offset); 106 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) 109 powerplay_table); 874 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local in function:pp_tables_get_num_of_entries 899 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local in function:pp_tables_get_entry 1570 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); local in function:get_vce_state_table_entry 1601 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table; local in function:pp_tables_initialize [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
amdgpu_arcturus_ppt.c | 504 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:arcturus_store_powerplay_table 512 powerplay_table = table_context->power_play_table; 514 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, 517 table_context->thermal_controller_type = powerplay_table->thermal_controller_type; 520 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || 521 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO)
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amdgpu_navi10_ppt.c | 525 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:navi10_store_powerplay_table 532 powerplay_table = table_context->power_play_table; 534 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, 537 table_context->thermal_controller_type = powerplay_table->thermal_controller_type; 540 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || 541 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) 1810 const struct smu_11_0_powerplay_table *powerplay_table = table_context->power_play_table; local in function:navi10_get_thermal_temperature_range 1812 if (!range || !powerplay_table) 1815 range->max = powerplay_table->software_shutdown_temp * 1972 const struct smu_11_0_powerplay_table *powerplay_table = NULL local in function:navi10_setup_od_limits [all...] |
amdgpu_smu_v11_0.c | 1065 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:smu_v11_0_get_max_power_limit 1067 powerplay_table = table_context->power_play_table; 1079 od_limit = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_ODSETTING_POWERPERCENTAGE]); 1165 const struct smu_11_0_powerplay_table *powerplay_table = table_context->power_play_table; local in function:smu_v11_0_set_thermal_range 1169 high = min((uint16_t)SMU_THERMAL_MAXIMUM_ALERT_TEMP, powerplay_table->software_shutdown_temp);
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amdgpu_vega20_ppt.c | 392 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL; local in function:vega20_setup_od8_information 402 powerplay_table = table_context->power_play_table; 404 if (powerplay_table->OverDrive8Table.ucODTableRevision == 1) { 408 (le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount) > 411 le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount); 418 od8_settings->od_feature_capabilities = kmemdup(&powerplay_table->OverDrive8Table.ODFeatureCapabilities, 427 (le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount) > 430 le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount); 437 od8_settings->od_settings_max = kmemdup(&powerplay_table->OverDrive8Table.ODSettingsMax, 450 od8_settings->od_settings_min = kmemdup(&powerplay_table->OverDrive8Table.ODSettingsMin 468 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL; local in function:vega20_store_powerplay_table 577 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL; local in function:vega20_check_powerplay_table 3106 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table = table_context->power_play_table; local in function:vega20_get_thermal_temperature_range [all...] |
amdgpu_arcturus_ppt.c | 504 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:arcturus_store_powerplay_table 512 powerplay_table = table_context->power_play_table; 514 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, 517 table_context->thermal_controller_type = powerplay_table->thermal_controller_type; 520 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || 521 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO)
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amdgpu_navi10_ppt.c | 525 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:navi10_store_powerplay_table 532 powerplay_table = table_context->power_play_table; 534 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, 537 table_context->thermal_controller_type = powerplay_table->thermal_controller_type; 540 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || 541 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) 1810 const struct smu_11_0_powerplay_table *powerplay_table = table_context->power_play_table; local in function:navi10_get_thermal_temperature_range 1812 if (!range || !powerplay_table) 1815 range->max = powerplay_table->software_shutdown_temp * 1972 const struct smu_11_0_powerplay_table *powerplay_table = NULL local in function:navi10_setup_od_limits [all...] |
amdgpu_smu_v11_0.c | 1065 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:smu_v11_0_get_max_power_limit 1067 powerplay_table = table_context->power_play_table; 1079 od_limit = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_ODSETTING_POWERPERCENTAGE]); 1165 const struct smu_11_0_powerplay_table *powerplay_table = table_context->power_play_table; local in function:smu_v11_0_set_thermal_range 1169 high = min((uint16_t)SMU_THERMAL_MAXIMUM_ALERT_TEMP, powerplay_table->software_shutdown_temp);
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amdgpu_vega20_ppt.c | 392 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL; local in function:vega20_setup_od8_information 402 powerplay_table = table_context->power_play_table; 404 if (powerplay_table->OverDrive8Table.ucODTableRevision == 1) { 408 (le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount) > 411 le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount); 418 od8_settings->od_feature_capabilities = kmemdup(&powerplay_table->OverDrive8Table.ODFeatureCapabilities, 427 (le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount) > 430 le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount); 437 od8_settings->od_settings_max = kmemdup(&powerplay_table->OverDrive8Table.ODSettingsMax, 450 od8_settings->od_settings_min = kmemdup(&powerplay_table->OverDrive8Table.ODSettingsMin 468 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL; local in function:vega20_store_powerplay_table 577 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL; local in function:vega20_check_powerplay_table 3106 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table = table_context->power_play_table; local in function:vega20_get_thermal_temperature_range [all...] |
amdgpu_arcturus_ppt.c | 504 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:arcturus_store_powerplay_table 512 powerplay_table = table_context->power_play_table; 514 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, 517 table_context->thermal_controller_type = powerplay_table->thermal_controller_type; 520 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || 521 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO)
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amdgpu_navi10_ppt.c | 525 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:navi10_store_powerplay_table 532 powerplay_table = table_context->power_play_table; 534 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, 537 table_context->thermal_controller_type = powerplay_table->thermal_controller_type; 540 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || 541 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) 1810 const struct smu_11_0_powerplay_table *powerplay_table = table_context->power_play_table; local in function:navi10_get_thermal_temperature_range 1812 if (!range || !powerplay_table) 1815 range->max = powerplay_table->software_shutdown_temp * 1972 const struct smu_11_0_powerplay_table *powerplay_table = NULL local in function:navi10_setup_od_limits [all...] |
amdgpu_smu_v11_0.c | 1065 const struct smu_11_0_powerplay_table *powerplay_table = NULL; local in function:smu_v11_0_get_max_power_limit 1067 powerplay_table = table_context->power_play_table; 1079 od_limit = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_ODSETTING_POWERPERCENTAGE]); 1165 const struct smu_11_0_powerplay_table *powerplay_table = table_context->power_play_table; local in function:smu_v11_0_set_thermal_range 1169 high = min((uint16_t)SMU_THERMAL_MAXIMUM_ALERT_TEMP, powerplay_table->software_shutdown_temp);
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