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Searched defs:pp_smu_status (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
dm_pp_smu.h	62 enum pp_smu_status { enum 175 enum pp_smu_status (set_display_count)(struct pp_smu pp, int count); 180 enum pp_smu_status (set_hard_min_dcfclk_by_freq)(struct pp_smu pp, int Mhz); 186 enum pp_smu_status (set_min_deep_sleep_dcfclk)(struct pp_smu pp, int Mhz); 191 enum pp_smu_status (set_hard_min_uclk_by_freq)(struct pp_smu pp, int Mhz); 196 enum pp_smu_status (set_hard_min_socclk_by_freq)(struct pp_smu pp, int Mhz); 199 enum pp_smu_status (set_pme_wa_enable)(struct pp_smu pp); 204 enum pp_smu_status (set_voltage_by_freq)(struct pp_smu pp, 219 enum pp_smu_status (set_wm_ranges)(struct pp_smu pp, 225 enum pp_smu_status (get_maximum_sustainable_clocks)(struct pp_smu pp [all...]
dm_pp_smu.h	62 enum pp_smu_status { enum 175 enum pp_smu_status (set_display_count)(struct pp_smu pp, int count); 180 enum pp_smu_status (set_hard_min_dcfclk_by_freq)(struct pp_smu pp, int Mhz); 186 enum pp_smu_status (set_min_deep_sleep_dcfclk)(struct pp_smu pp, int Mhz); 191 enum pp_smu_status (set_hard_min_uclk_by_freq)(struct pp_smu pp, int Mhz); 196 enum pp_smu_status (set_hard_min_socclk_by_freq)(struct pp_smu pp, int Mhz); 199 enum pp_smu_status (set_pme_wa_enable)(struct pp_smu pp); 204 enum pp_smu_status (set_voltage_by_freq)(struct pp_smu pp, 219 enum pp_smu_status (set_wm_ranges)(struct pp_smu pp, 225 enum pp_smu_status (get_maximum_sustainable_clocks)(struct pp_smu pp [all...]

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