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    Searched defs:psr (Results 1 - 25 of 46) sorted by relevancy

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  /src/sys/arch/ia64/stand/ia64/ski/
ssc.c 39 * PSR.dt register is not preserved properly and causes further memory
41 * PSR.dt across the SSC call. We do this by saving and restoring psr.l
49 register u_int64_t psr; local in function:ssc
52 __asm __volatile("mov %0=psr;;" : "=r"(psr));
57 __asm __volatile("mov psr.l=%0;; srlz.d" :: "r"(psr));
ssc.c 39 * PSR.dt register is not preserved properly and causes further memory
41 * PSR.dt across the SSC call. We do this by saving and restoring psr.l
49 register u_int64_t psr; local in function:ssc
52 __asm __volatile("mov %0=psr;;" : "=r"(psr));
57 __asm __volatile("mov psr.l=%0;; srlz.d" :: "r"(psr));
  /src/sys/arch/sparc/sparc/
process_machdep.c 125 int psr = l->l_md.md_tf->tf_psr & ~PSR_ICC; local in function:process_write_regs
131 l->l_md.md_tf->tf_psr = psr | (regs->r_psr & PSR_ICC);
process_machdep.c 125 int psr = l->l_md.md_tf->tf_psr & ~PSR_ICC; local in function:process_write_regs
131 l->l_md.md_tf->tf_psr = psr | (regs->r_psr & PSR_ICC);
trap.c 222 trap(unsigned type, int psr, int pc, struct trapframe *tf)
241 if (psr & PSR_PS) {
297 snprintb(bits, sizeof(bits), PSR_BITS, psr);
298 printf("trap type 0x%x: pc=0x%x npc=0x%x psr=%s\n",
335 snprintb(bits, sizeof(bits), PSR_BITS, psr);
336 printf("trap type 0x%x: pc=0x%x npc=0x%x psr=%s\n",
759 mem_access_fault(unsigned type, int ser, u_int v, int pc, int psr,
826 if (psr & PSR_PS) {
922 if (psr & PSR_PS) {
965 if ((psr & PSR_PS) == 0)
978 int pc, psr; local in function:mem_access_fault4m
    [all...]
trap.c 222 trap(unsigned type, int psr, int pc, struct trapframe *tf)
241 if (psr & PSR_PS) {
297 snprintb(bits, sizeof(bits), PSR_BITS, psr);
298 printf("trap type 0x%x: pc=0x%x npc=0x%x psr=%s\n",
335 snprintb(bits, sizeof(bits), PSR_BITS, psr);
336 printf("trap type 0x%x: pc=0x%x npc=0x%x psr=%s\n",
759 mem_access_fault(unsigned type, int ser, u_int v, int pc, int psr,
826 if (psr & PSR_PS) {
922 if (psr & PSR_PS) {
965 if ((psr & PSR_PS) == 0)
978 int pc, psr; local in function:mem_access_fault4m
    [all...]
  /src/sys/arch/ia64/stand/efi/libefi/
exec.c 99 u_int64_t psr; local in function:disable_ic
100 __asm __volatile("mov %0=psr;;" : "=r" (psr));
101 __asm __volatile("rsm psr.ic|psr.i;; srlz.i;;");
102 return psr;
106 restore_ic(u_int64_t psr)
108 __asm __volatile("mov psr.l=%0;; srlz.i" :: "r" (psr));
112 * Entered with psr.ic and psr.i both zero
117 u_int64_t psr; local in function:enter_kernel
138 u_int64_t psr; local in function:elf64_exec
    [all...]
exec.c 99 u_int64_t psr; local in function:disable_ic
100 __asm __volatile("mov %0=psr;;" : "=r" (psr));
101 __asm __volatile("rsm psr.ic|psr.i;; srlz.i;;");
102 return psr;
106 restore_ic(u_int64_t psr)
108 __asm __volatile("mov psr.l=%0;; srlz.i" :: "r" (psr));
112 * Entered with psr.ic and psr.i both zero
117 u_int64_t psr; local in function:enter_kernel
138 u_int64_t psr; local in function:elf64_exec
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dmub_psr.c 42 * Get PSR state from firmware.
51 * Enable/Disable PSR.
73 * Set PSR level.
97 * Setup PSR by programming phy registers and sending psr hw context values to firmware.
193 * Construct PSR object.
195 static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx)
197 psr->ctx = ctx;
198 psr->funcs = &psr_funcs;
202 * Allocate and initialize PSR object
206 struct dmub_psr *psr = kzalloc(sizeof(struct dmub_psr), GFP_KERNEL); local in function:dmub_psr_create
    [all...]
dmub_psr.c 42 * Get PSR state from firmware.
51 * Enable/Disable PSR.
73 * Set PSR level.
97 * Setup PSR by programming phy registers and sending psr hw context values to firmware.
193 * Construct PSR object.
195 static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx)
197 psr->ctx = ctx;
198 psr->funcs = &psr_funcs;
202 * Allocate and initialize PSR object
206 struct dmub_psr *psr = kzalloc(sizeof(struct dmub_psr), GFP_KERNEL); local in function:dmub_psr_create
    [all...]
  /src/sys/arch/ia64/include/
cpufunc.h 201 __asm __volatile ("rsm psr.i");
208 __asm __volatile ("ssm psr.i;; srlz.d");
214 register_t psr; local in function:intr_disable
216 __asm __volatile ("mov %0=psr;;" : "=r"(psr));
218 return (psr & IA64_PSR_I) ? 1 : 0;
cpufunc.h 201 __asm __volatile ("rsm psr.i");
208 __asm __volatile ("ssm psr.i;; srlz.d");
214 register_t psr; local in function:intr_disable
216 __asm __volatile ("mov %0=psr;;" : "=r"(psr));
218 return (psr & IA64_PSR_I) ? 1 : 0;
_regset.h 69 unsigned long psr; member in struct:_special
  /src/sys/arch/arm/at91/
at91pio.c 128 uint32_t psr, osr, pin; local in function:at91pio_attach
154 psr = PIO_READ(sc, PIO_PSR); // only ports
157 psr &= ~at91_gpio_mask(sc->sc_pid);
160 if (psr & (1 << j))
at91pio.c 128 uint32_t psr, osr, pin; local in function:at91pio_attach
154 psr = PIO_READ(sc, PIO_PSR); // only ports
157 psr &= ~at91_gpio_mask(sc->sc_pid);
160 if (psr & (1 << j))
  /src/sys/dev/isa/
if_ntwoc_isa.c 151 u_int8_t psr; local in function:ntwoc_isa_set_page
153 /* get old psr value replace old window with new */
154 psr = bus_space_read_1(sca->sc_iot, sca->sc_ioh, NTWOC_PSR);
155 psr &= ~NTWOC_PG_MSK;
156 psr |= ((addr >> sca->scu_pageshift) & NTWOC_PG_MSK);
157 bus_space_write_1(sca->sc_iot, sca->sc_ioh, NTWOC_PSR, psr);
if_ntwoc_isa.c 151 u_int8_t psr; local in function:ntwoc_isa_set_page
153 /* get old psr value replace old window with new */
154 psr = bus_space_read_1(sca->sc_iot, sca->sc_ioh, NTWOC_PSR);
155 psr &= ~NTWOC_PG_MSK;
156 psr |= ((addr >> sca->scu_pageshift) & NTWOC_PG_MSK);
157 bus_space_write_1(sca->sc_iot, sca->sc_ioh, NTWOC_PSR, psr);
  /src/sys/arch/ia64/ia64/
machdep.c 268 uint64_t psr; local in function:map_vhpt
283 __asm __volatile("mov %0=psr" : "=r"(psr));
284 __asm __volatile("rsm psr.ic|psr.i");
290 __asm __volatile("mov psr.l=%0" :: "r" (psr));
298 uint64_t psr; local in function:map_pal_code
311 __asm __volatile("mov %0=psr" : "=r"(psr));
330 uint64_t psr; local in function:map_gateway_page
    [all...]
machdep.c 268 uint64_t psr; local in function:map_vhpt
283 __asm __volatile("mov %0=psr" : "=r"(psr));
284 __asm __volatile("rsm psr.ic|psr.i");
290 __asm __volatile("mov psr.l=%0" :: "r" (psr));
298 uint64_t psr; local in function:map_pal_code
311 __asm __volatile("mov %0=psr" : "=r"(psr));
330 uint64_t psr; local in function:map_gateway_page
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_psr.c 42 * DOC: Panel Self Refresh (PSR/SRD)
45 * panels witch have a remote frame buffer (RFB) implemented according to PSR
46 * spec in eDP1.3. PSR feature allows the display to go to lower standby states
54 * PSR saves power by caching the framebuffer in the panel RFB, which allows us
58 * The implementation uses the hardware-based PSR support which automatically
63 * part doesn't work too well, hence why the i915 PSR support uses the
90 switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
112 imr_reg = TRANS_PSR_IMR(dev_priv->psr.transcoder);
114 trans_shift = dev_priv->psr.transcoder;
119 if (dev_priv->psr.debug & I915_PSR_DEBUG_IRQ
1013 struct i915_psr *psr = &dev_priv->psr; local in function:intel_psr_update
1201 struct i915_psr *psr = &dev_priv->psr; local in function:intel_psr_handle_irq
1424 struct i915_psr *psr = &dev_priv->psr; local in function:psr_alpm_check
1450 struct i915_psr *psr = &dev_priv->psr; local in function:psr_capability_changed_check
1473 struct i915_psr *psr = &dev_priv->psr; local in function:intel_psr_short_pulse
    [all...]
intel_psr.c 42 * DOC: Panel Self Refresh (PSR/SRD)
45 * panels witch have a remote frame buffer (RFB) implemented according to PSR
46 * spec in eDP1.3. PSR feature allows the display to go to lower standby states
54 * PSR saves power by caching the framebuffer in the panel RFB, which allows us
58 * The implementation uses the hardware-based PSR support which automatically
63 * part doesn't work too well, hence why the i915 PSR support uses the
90 switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
112 imr_reg = TRANS_PSR_IMR(dev_priv->psr.transcoder);
114 trans_shift = dev_priv->psr.transcoder;
119 if (dev_priv->psr.debug & I915_PSR_DEBUG_IRQ
1013 struct i915_psr *psr = &dev_priv->psr; local in function:intel_psr_update
1201 struct i915_psr *psr = &dev_priv->psr; local in function:intel_psr_handle_irq
1424 struct i915_psr *psr = &dev_priv->psr; local in function:psr_alpm_check
1450 struct i915_psr *psr = &dev_priv->psr; local in function:psr_capability_changed_check
1473 struct i915_psr *psr = &dev_priv->psr; local in function:intel_psr_short_pulse
    [all...]
  /src/sys/arch/sparc/include/
psl.h 91 * SPARC V9 PSTATE register (what replaces the PSR in V9)
243 * GCC pseudo-functions for manipulating PSR (primarily PIL field).
248 int psr; local in function:getpsr
250 __asm volatile("rd %%psr,%0" : "=r" (psr));
251 return (psr);
266 __asm volatile("wr %0,0,%%psr" : : "r" (newpsr) : "memory");
273 int psr, oldipl; local in function:spl0
276 * wrpsr xors two values: we choose old psr and old ipl here,
277 * which gives us the same value as the old psr but with al
321 int psr, oldipl; local in function:splraiseipl
352 int psr; local in function:splx
    [all...]
psl.h 91 * SPARC V9 PSTATE register (what replaces the PSR in V9)
243 * GCC pseudo-functions for manipulating PSR (primarily PIL field).
248 int psr; local in function:getpsr
250 __asm volatile("rd %%psr,%0" : "=r" (psr));
251 return (psr);
266 __asm volatile("wr %0,0,%%psr" : : "r" (newpsr) : "memory");
273 int psr, oldipl; local in function:spl0
276 * wrpsr xors two values: we choose old psr and old ipl here,
277 * which gives us the same value as the old psr but with al
321 int psr, oldipl; local in function:splraiseipl
352 int psr; local in function:splx
    [all...]
  /src/sys/arch/mac68k/mac68k/
machdep.c 2262 u_short psr; local in function:get_physical
2278 switch (get_pte(addr, pte, &psr)) {
2297 psr &= 0x0007; /* Number of levels we went */
2298 for (i = 0; i < psr; i++)
machdep.c 2262 u_short psr; local in function:get_physical
2278 switch (get_pte(addr, pte, &psr)) {
2297 psr &= 0x0007; /* Number of levels we went */
2298 for (i = 0; i < psr; i++)

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