/src/sys/external/bsd/drm2/dist/drm/i915/display/ |
intel_dpio_phy.c | 149 * @pwron_mask: Mask with the appropriate bit set that would cause the 152 u32 pwron_mask; member in struct:bxt_ddi_phy_info 169 .pwron_mask = BIT(0), 179 .pwron_mask = BIT(1), 191 .pwron_mask = BIT(0), 201 .pwron_mask = BIT(3), 211 .pwron_mask = BIT(1), 322 if (!(I915_READ(BXT_P_CR_GT_DISP_PWRON) & phy_info->pwron_mask)) 382 val |= phy_info->pwron_mask; 465 val &= ~phy_info->pwron_mask; [all...] |
intel_dpio_phy.c | 149 * @pwron_mask: Mask with the appropriate bit set that would cause the 152 u32 pwron_mask; member in struct:bxt_ddi_phy_info 169 .pwron_mask = BIT(0), 179 .pwron_mask = BIT(1), 191 .pwron_mask = BIT(0), 201 .pwron_mask = BIT(3), 211 .pwron_mask = BIT(1), 322 if (!(I915_READ(BXT_P_CR_GT_DISP_PWRON) & phy_info->pwron_mask)) 382 val |= phy_info->pwron_mask; 465 val &= ~phy_info->pwron_mask; [all...] |
intel_dpio_phy.c | 149 * @pwron_mask: Mask with the appropriate bit set that would cause the 152 u32 pwron_mask; member in struct:bxt_ddi_phy_info 169 .pwron_mask = BIT(0), 179 .pwron_mask = BIT(1), 191 .pwron_mask = BIT(0), 201 .pwron_mask = BIT(3), 211 .pwron_mask = BIT(1), 322 if (!(I915_READ(BXT_P_CR_GT_DISP_PWRON) & phy_info->pwron_mask)) 382 val |= phy_info->pwron_mask; 465 val &= ~phy_info->pwron_mask; [all...] |