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Searched defs:ref_divider (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_clock_source.c	`127 * ref_divider Reference divider (already known) 143 uint32_t ref_divider, 151 (uint64_t)target_pix_clk_100hz * ref_divider * post_divider; 189 * ref_divider Reference divider (already known) 202 uint32_t ref_divider, 215 ref_divider, 227 ref_divider * post_divider * 242 pll_settings->reference_divider = ref_divider; 264 uint32_t ref_divider; local in function:calc_pll_dividers_in_range 280 ref_divider = min_ref_divider [all...]`
amdgpu_dce_clock_source.c	`127 * ref_divider Reference divider (already known) 143 uint32_t ref_divider, 151 (uint64_t)target_pix_clk_100hz * ref_divider * post_divider; 189 * ref_divider Reference divider (already known) 202 uint32_t ref_divider, 215 ref_divider, 227 ref_divider * post_divider * 242 pll_settings->reference_divider = ref_divider; 264 uint32_t ref_divider; local in function:calc_pll_dividers_in_range 280 ref_divider = min_ref_divider [all...]`
amdgpu_dce_clock_source.c	`127 * ref_divider Reference divider (already known) 143 uint32_t ref_divider, 151 (uint64_t)target_pix_clk_100hz * ref_divider * post_divider; 189 * ref_divider Reference divider (already known) 202 uint32_t ref_divider, 215 ref_divider, 227 ref_divider * post_divider * 242 pll_settings->reference_divider = ref_divider; 264 uint32_t ref_divider; local in function:calc_pll_dividers_in_range 280 ref_divider = min_ref_divider [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_ci_smumgr.c	`311 uint32_t ref_divider; local in function:ci_calculate_sclk_params 324 ref_divider = 1 + dividers.uc_pll_ref_div; 351 (ref_divider * ss_info.speed_spectrum_rate);`
amdgpu_fiji_smumgr.c	`873 uint32_t ref_divider; local in function:fiji_calculate_sclk_params 886 ref_divider = 1 + dividers.uc_pll_ref_div; 919 (ref_divider * ssInfo.speed_spectrum_rate);`
amdgpu_ci_smumgr.c	`311 uint32_t ref_divider; local in function:ci_calculate_sclk_params 324 ref_divider = 1 + dividers.uc_pll_ref_div; 351 (ref_divider * ss_info.speed_spectrum_rate);`
amdgpu_fiji_smumgr.c	`873 uint32_t ref_divider; local in function:fiji_calculate_sclk_params 886 ref_divider = 1 + dividers.uc_pll_ref_div; 919 (ref_divider * ssInfo.speed_spectrum_rate);`
amdgpu_ci_smumgr.c	`311 uint32_t ref_divider; local in function:ci_calculate_sclk_params 324 ref_divider = 1 + dividers.uc_pll_ref_div; 351 (ref_divider * ss_info.speed_spectrum_rate);`
amdgpu_fiji_smumgr.c	`873 uint32_t ref_divider; local in function:fiji_calculate_sclk_params 886 ref_divider = 1 + dividers.uc_pll_ref_div; 919 (ref_divider * ssInfo.speed_spectrum_rate);`

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