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    Searched defs:refclk (Results 1 - 5 of 5) sorted by relevancy

  /xsrc/external/mit/xf86-video-ati/dist/src/
radeon_bios.c 893 int offset, refclk, stds; local
935 refclk = (RADEON_BIOS8(offset + 9) >> 2) & 0x3;
936 if (refclk == 0)
938 else if (refclk == 1)
940 else if (refclk == 2)
942 else if (refclk == 3)
  /xsrc/external/mit/xf86-video-nv/dist/src/
g80_display.c 57 const float refclk = 27000.0f; local
108 if(refclk / ma < minUA)
110 else if(refclk / ma > maxUA)
115 if(refclk * na / ma < minVcoA || refclk * na / ma > maxVcoA)
120 if(refclk * na / ma / mb < minUB)
122 else if(refclk * na / ma / mb > maxUB)
125 nb = rint(pclk * (1 << p) * (ma / (float)na) * mb / refclk);
133 float freq = refclk * (na / (float)ma) * (nb / (float)mb) / (1 << p);
153 const float refclk = 27000.0f local
    [all...]
  /xsrc/external/mit/xf86-video-intel-old/dist/src/
i830_debug.c 1047 char *refclk = NULL; local
1068 refclk = "default 120Mhz";
1071 refclk = "SuperSSC 120Mhz";
1074 refclk = "SDVO TVClkIn";
1077 refclk = "SSC";
1080 refclk = "DMI RefCLK";
1087 "FPA0 P1 %d, FPA1 P1 %d, refclk %s, sdvo/hdmi mul %d",
1088 enable, highspeed, mode, p2, fpa0_p1, fpa1_p1, refclk, sdvo_mul);
i830_display.c 459 /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
461 static void i8xx_clock(int refclk, intel_clock_t *clock)
465 clock->vco = refclk * clock->m / (clock->n + 2);
469 /** Derive the pixel clock for the given refclk and divisors for 9xx chips. */
471 static void i9xx_clock(int refclk, intel_clock_t *clock)
475 clock->vco = refclk * clock->m / (clock->n + 2);
480 static void igd_clock(int refclk, intel_clock_t *clock)
484 clock->vco = refclk * clock->m / clock->n;
488 static void intel_clock(I830Ptr pI830, int refclk, intel_clock_t *clock)
492 igd_clock(refclk, clock)
1518 int refclk; local
    [all...]
  /xsrc/external/mit/xf86-video-mach64/dist/src/
atistruct.h 347 int refclk; member in struct:_ATIRec

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