| /src/sys/arch/evbsh3/t_sh7706lan/ |
| t_sh7706lan.c | 44 uint16_t reg; local in function:machine_init
50 reg = _reg_read_2(SH7709_SCPCR);
51 reg &= 0x3ff;
52 _reg_write_2(SH7709_SCPCR, reg);
58 reg = _reg_read_2(SH3_BCR2);
59 reg &= ~(BCR2_AREA_WIDTH_MASK << BCR2_AREA4_SHIFT);
60 reg |= (BCR2_AREA_WIDTH_8 << BCR2_AREA4_SHIFT);
61 _reg_write_2(SH3_BCR2, reg);
|
| t_sh7706lan.c | 44 uint16_t reg; local in function:machine_init
50 reg = _reg_read_2(SH7709_SCPCR);
51 reg &= 0x3ff;
52 _reg_write_2(SH7709_SCPCR, reg);
58 reg = _reg_read_2(SH3_BCR2);
59 reg &= ~(BCR2_AREA_WIDTH_MASK << BCR2_AREA4_SHIFT);
60 reg |= (BCR2_AREA_WIDTH_8 << BCR2_AREA4_SHIFT);
61 _reg_write_2(SH3_BCR2, reg);
|
| /src/sys/arch/cobalt/stand/boot/ |
| pci.c | 42 uint32_t reg; local in function:pcicfgread
49 reg = *pcicfg_data;
52 return reg;
|
| pci.c | 42 uint32_t reg; local in function:pcicfgread
49 reg = *pcicfg_data;
52 return reg;
|
| /src/sys/arch/or1k/include/ |
| reg.h | 1 /* $NetBSD: reg.h,v 1.1 2014/09/03 19:34:26 matt Exp $ */
47 struct reg { struct
|
| reg.h | 1 /* $NetBSD: reg.h,v 1.1 2014/09/03 19:34:26 matt Exp $ */
47 struct reg { struct
|
| pcb.h | 35 #include <or1k/reg.h>
42 struct reg reg; member in struct:md_coredump
|
| pcb.h | 35 #include <or1k/reg.h>
42 struct reg reg; member in struct:md_coredump
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_smu7_baco.c | 44 uint32_t reg; local in function:smu7_baco_get_capability
50 reg = RREG32(mmCC_BIF_BX_FUSESTRAP0);
52 if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK)
61 uint32_t reg; local in function:smu7_baco_get_state
63 reg = RREG32(mmBACO_CNTL);
65 if (reg & BACO_CNTL__BACO_MODE_MASK)
|
| amdgpu_smu9_baco.c | 39 uint32_t reg, data; local in function:smu9_baco_get_capability
49 reg = RREG32_SOC15(NBIF, 0, mmRCC_BIF_STRAP0);
51 if (reg & RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK)
61 uint32_t reg; local in function:smu9_baco_get_state
63 reg = RREG32_SOC15(NBIF, 0, mmBACO_CNTL);
65 if (reg & BACO_CNTL__BACO_MODE_MASK)
|
| amdgpu_smu7_baco.c | 44 uint32_t reg; local in function:smu7_baco_get_capability
50 reg = RREG32(mmCC_BIF_BX_FUSESTRAP0);
52 if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK)
61 uint32_t reg; local in function:smu7_baco_get_state
63 reg = RREG32(mmBACO_CNTL);
65 if (reg & BACO_CNTL__BACO_MODE_MASK)
|
| amdgpu_smu9_baco.c | 39 uint32_t reg, data; local in function:smu9_baco_get_capability
49 reg = RREG32_SOC15(NBIF, 0, mmRCC_BIF_STRAP0);
51 if (reg & RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK)
61 uint32_t reg; local in function:smu9_baco_get_state
63 reg = RREG32_SOC15(NBIF, 0, mmBACO_CNTL);
65 if (reg & BACO_CNTL__BACO_MODE_MASK)
|
| /src/sys/arch/arm/ixp12x0/ |
| ixp12x0.c | 49 pcireg_t reg; local in function:ixp12x0_attach
79 reg = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
82 SA_CONTROL, reg);
101 reg = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
104 SA_CONTROL, reg);
133 reg = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
136 SA_CONTROL, reg);
145 reg = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
151 PCI_COMMAND_STATUS_REG, reg);
|
| ixp12x0.c | 49 pcireg_t reg; local in function:ixp12x0_attach
79 reg = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
82 SA_CONTROL, reg);
101 reg = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
104 SA_CONTROL, reg);
133 reg = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
136 SA_CONTROL, reg);
145 reg = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
151 PCI_COMMAND_STATUS_REG, reg);
|
| /src/sys/arch/aarch64/include/ |
| pcb.h | 37 #include <aarch64/reg.h>
45 struct reg reg; member in struct:md_coredump
|
| pcb.h | 37 #include <aarch64/reg.h>
45 struct reg reg; member in struct:md_coredump
|
| /src/sys/arch/amd64/include/ |
| reg.h | 1 /* $NetBSD: reg.h,v 1.11 2022/05/22 11:27:33 andvar Exp $ */
34 * @(#)reg.h 5.5 (Berkeley) 1/18/91
51 struct reg { struct
74 #include <i386/reg.h>
|
| reg.h | 1 /* $NetBSD: reg.h,v 1.11 2022/05/22 11:27:33 andvar Exp $ */
34 * @(#)reg.h 5.5 (Berkeley) 1/18/91
51 struct reg { struct
74 #include <i386/reg.h>
|
| /src/sys/arch/usermode/include/ |
| reg.h | 1 /* $NetBSD: reg.h,v 1.4 2018/05/18 20:09:32 reinoud Exp $ */
35 struct reg { struct
|
| reg.h | 1 /* $NetBSD: reg.h,v 1.4 2018/05/18 20:09:32 reinoud Exp $ */
35 struct reg { struct
|
| /src/sys/dev/i2c/ |
| au8522mod.h | 33 uint16_t reg; member in struct:au8522_modulation_table
|
| au8522mod.h | 33 uint16_t reg; member in struct:au8522_modulation_table
|
| /src/sys/arch/evbmips/gdium/ |
| gdium_genfb.c | 69 pcireg_t reg; local in function:gdium_cnattach
80 reg = pci_conf_read(&gc->gc_pc, pci_make_tag(&gc->gc_pc, 0, 14, 0),
83 ri->ri_bits = (char *)MIPS_PHYS_TO_KSEG1(BONITO_PCILO_BASE + reg);
|
| gdium_genfb.c | 69 pcireg_t reg; local in function:gdium_cnattach
80 reg = pci_conf_read(&gc->gc_pc, pci_make_tag(&gc->gc_pc, 0, 14, 0),
83 ri->ri_bits = (char *)MIPS_PHYS_TO_KSEG1(BONITO_PCILO_BASE + reg);
|
| /src/sys/arch/evbarm/stand/board/ |
| becc_mem.c | 65 uint32_t start, size, reg, save, heap; local in function:mem_init
76 reg = BECC_PCICORE_READ(PCI_CLASS_REG);
78 if (PCI_REVISION(reg) <= BECC_REV_V7)
84 reg = BECC_PCICORE_READ(BECC_SDRAM_BAR);
88 size = PCI_MAPREG_MEM_SIZE(reg);
|
