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  /src/sys/arch/powerpc/pci/
pchb.c 80 pcireg_t reg1, reg2; local
83 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag, MPC105_PICR1);
103 switch (reg1 & MPC105_PICR1_L2_MP) {
123 pcireg_t reg1, reg2; local
126 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag, MPC106_PICR1);
146 switch (reg1 & MPC106_PICR1_EXT_L2_EN) {
148 switch (reg1 & MPC106_PICR1_L2_MP) {
164 switch (reg1 & MPC106_PICR1_L2_MP) {
182 pcireg_t reg1; local
188 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag
    [all...]
pchb.c 80 pcireg_t reg1, reg2; local
83 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag, MPC105_PICR1);
103 switch (reg1 & MPC105_PICR1_L2_MP) {
123 pcireg_t reg1, reg2; local
126 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag, MPC106_PICR1);
146 switch (reg1 & MPC106_PICR1_EXT_L2_EN) {
148 switch (reg1 & MPC106_PICR1_L2_MP) {
164 switch (reg1 & MPC106_PICR1_L2_MP) {
182 pcireg_t reg1; local
188 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag
    [all...]
  /src/sys/arch/sgimips/ioc/
oioc.c 98 uint32_t reg1, reg2; local
118 reg1 = 12 << OIOC2_CONFIG_HIWAT_SHFT;
119 reg1 |= OIOC2_CONFIG_BURST_MASK;
120 bus_space_write_4(sc->sc_iot, sc->sc_ioh, OIOC2_CONFIG, reg1);
123 if ((reg2 & (reg1 | OIOC2_CONFIG_NOSYNC_MASK)) == reg1)
oioc.c 98 uint32_t reg1, reg2; local
118 reg1 = 12 << OIOC2_CONFIG_HIWAT_SHFT;
119 reg1 |= OIOC2_CONFIG_BURST_MASK;
120 bus_space_write_4(sc->sc_iot, sc->sc_ioh, OIOC2_CONFIG, reg1);
123 if ((reg2 & (reg1 | OIOC2_CONFIG_NOSYNC_MASK)) == reg1)
  /src/external/gpl3/gdb.old/dist/gdbsupport/
tdesc.cc 83 const tdesc_reg_up &reg1 = registers[ix]; local
86 if (reg1 != reg2 && *reg1 != *reg2)
tdesc.cc 83 const tdesc_reg_up &reg1 = registers[ix]; local
86 if (reg1 != reg2 && *reg1 != *reg2)
  /src/external/gpl3/gdb/dist/gdbsupport/
tdesc.cc 83 const tdesc_reg_up &reg1 = registers[ix]; local
86 if (reg1 != reg2 && *reg1 != *reg2)
tdesc.cc 83 const tdesc_reg_up &reg1 = registers[ix]; local
86 if (reg1 != reg2 && *reg1 != *reg2)
  /src/sys/arch/hpcmips/dev/
plumicu.c 332 plumreg_t reg1, reg2, reg_ext, reg_pccard; local
337 reg1 = plum_conf_read(regt, regh, PLUM_INT_INTSTA_REG);
350 if (!(pic->ic_ackpat1 & reg1))
plumicu.c 332 plumreg_t reg1, reg2, reg_ext, reg_pccard; local
337 reg1 = plum_conf_read(regt, regh, PLUM_INT_INTSTA_REG);
350 if (!(pic->ic_ackpat1 & reg1))
  /src/sys/arch/hpcsh/dev/
psh3lcd.c 72 uint8_t reg1; member in struct:psh3lcd_x0_bcd
83 uint8_t reg1; member in struct:psh3lcd_xx0_bcd
144 bcr1 == psh3lcd_x0_bcd[i].reg1 &&
161 for (i = 0; psh3lcd_xx0_bcd[i].reg1 != 0; i++)
162 if (bcr1 == psh3lcd_xx0_bcd[i].reg1 &&
165 if (psh3lcd_xx0_bcd[i].reg1 == 0)
174 _reg_write_1(PSH3LCD_BRIGHTNESS_REG1, psh3lcd_xx0_bcd[index].reg1);
183 _reg_write_1(PSH3LCD_BRIGHTNESS_REG1, psh3lcd_x0_bcd[index].reg1);
psh3lcd.c 72 uint8_t reg1; member in struct:psh3lcd_x0_bcd
83 uint8_t reg1; member in struct:psh3lcd_xx0_bcd
144 bcr1 == psh3lcd_x0_bcd[i].reg1 &&
161 for (i = 0; psh3lcd_xx0_bcd[i].reg1 != 0; i++)
162 if (bcr1 == psh3lcd_xx0_bcd[i].reg1 &&
165 if (psh3lcd_xx0_bcd[i].reg1 == 0)
174 _reg_write_1(PSH3LCD_BRIGHTNESS_REG1, psh3lcd_xx0_bcd[index].reg1);
183 _reg_write_1(PSH3LCD_BRIGHTNESS_REG1, psh3lcd_x0_bcd[index].reg1);
  /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/
nouveau_dispnv04_hw.c 136 nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1,
147 if (reg1 <= 0x405c) {
174 uint32_t reg1, pll1, pll2 = 0; local
179 if (ret || !(reg1 = pll_lim.reg))
182 pll1 = nvif_rd32(device, reg1);
183 if (reg1 <= 0x405c)
184 pll2 = nvif_rd32(device, reg1 + 4);
186 uint32_t reg2 = reg1 + (reg1 == NV_RAMDAC_VPLL2 ? 0x5c : 0x70);
191 if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS && reg1 >= NV_PRAMDAC_VPLL_COEFF)
    [all...]
nouveau_dispnv04_hw.c 136 nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1,
147 if (reg1 <= 0x405c) {
174 uint32_t reg1, pll1, pll2 = 0; local
179 if (ret || !(reg1 = pll_lim.reg))
182 pll1 = nvif_rd32(device, reg1);
183 if (reg1 <= 0x405c)
184 pll2 = nvif_rd32(device, reg1 + 4);
186 uint32_t reg2 = reg1 + (reg1 == NV_RAMDAC_VPLL2 ? 0x5c : 0x70);
191 if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS && reg1 >= NV_PRAMDAC_VPLL_COEFF)
    [all...]
  /src/external/gpl3/gcc.old/dist/gcc/
cfgloopanal.cc 347 rtx reg1 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 1); local
382 emit_move_insn (reg1, reg2);
388 emit_move_insn (mem, reg1);
cfgloopanal.cc 347 rtx reg1 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 1); local
382 emit_move_insn (reg1, reg2);
388 emit_move_insn (mem, reg1);
  /src/sys/arch/hpcmips/vr/
vrc4172gpio.c 161 u_int16_t reg0, reg1; local
164 reg1 = read_2(sc, off + VRC2_EXGP_OFFSET);
166 return (reg0|(reg1<<16));
  /src/sys/dev/ic/
aic6915.c 1232 uint32_t reg0, reg1, reg2; local
1235 reg1 = enaddr[3] | (enaddr[2] << 8);
1239 sf_genreg_write(sc, SF_PERFECT_BASE + (slot * 0x10) + 4, reg1);
  /src/crypto/external/apache2/openssl/dist/crypto/aria/
aria.c 425 register uint32_t reg0, reg1, reg2, reg3; local
441 reg1 = GET_U32_BE(in, 1);
445 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
448 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3);
449 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
453 ARIA_SUBST_DIFF_EVEN(reg0, reg1, reg2, reg3);
454 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
457 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3);
458 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
463 reg1 = rk->u[1] ^ MAKE_U32((uint8_t)(X1[GET_U8_BE(reg1, 0)]), (uint8_t)(X2[GET_U8_BE(reg1, 1)] >> 8), ( (…)
476 register uint32_t reg0, reg1, reg2, reg3; local
609 register uint32_t reg0, reg1, reg2, reg3; local
    [all...]
  /src/crypto/external/bsd/openssl/dist/crypto/aria/
aria.c 474 register uint32_t reg0, reg1, reg2, reg3; local
490 reg1 = GET_U32_BE(in, 1);
494 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
497 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3);
498 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
502 ARIA_SUBST_DIFF_EVEN(reg0, reg1, reg2, reg3);
503 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
506 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3);
507 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
516 reg1 = rk->u[1] ^ MAKE_U32
541 register uint32_t reg0, reg1, reg2, reg3; local
676 register uint32_t reg0, reg1, reg2, reg3; local
    [all...]
  /src/crypto/external/bsd/openssl.old/dist/crypto/aria/
aria.c 474 register uint32_t reg0, reg1, reg2, reg3; local
490 reg1 = GET_U32_BE(in, 1);
494 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
497 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3);
498 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
502 ARIA_SUBST_DIFF_EVEN(reg0, reg1, reg2, reg3);
503 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
506 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3);
507 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3);
516 reg1 = rk->u[1] ^ MAKE_U32
541 register uint32_t reg0, reg1, reg2, reg3; local
676 register uint32_t reg0, reg1, reg2, reg3; local
    [all...]
  /src/external/bsd/pcc/dist/pcc/arch/pdp10/
local2.c 450 int reg1 = getlr(p, '1')->n_rval; local
455 printf(" ldb %s,%s\n", rnames[reg1], rnames[reg]);
459 printf(" lsh %s,033\n", rnames[reg1]);
460 printf(" ash %s,-033\n", rnames[reg1]);
464 rnames[reg1], rnames[reg1]);
  /src/external/gpl3/binutils/dist/gas/
dw2gencfi.h 135 unsigned reg1; member in struct:cfi_insn_data::__anon10150::__anon10152
  /src/external/gpl3/binutils.old/dist/gas/
dw2gencfi.h 135 unsigned reg1; member in struct:cfi_insn_data::__anon11622::__anon11624
  /src/external/gpl3/gcc/dist/gcc/
cfgloopanal.cc 438 rtx reg1 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 1); local
473 emit_move_insn (reg1, reg2);
479 emit_move_insn (mem, reg1);

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