| /src/external/gpl3/gdb/dist/sim/iq2000/ |
| iq2000.c | 65 const int ret_reg = 2; local
88 SET_H_GR (ret_reg,
95 SET_H_GR (ret_reg,
107 SET_H_GR (ret_reg,
117 SET_H_GR (ret_reg,
124 SET_H_GR (ret_reg,
129 SET_H_GR (ret_reg, time (0));
133 SET_H_GR (ret_reg, -1);
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| iq2000.c | 65 const int ret_reg = 2; local
88 SET_H_GR (ret_reg,
95 SET_H_GR (ret_reg,
107 SET_H_GR (ret_reg,
117 SET_H_GR (ret_reg,
124 SET_H_GR (ret_reg,
129 SET_H_GR (ret_reg, time (0));
133 SET_H_GR (ret_reg, -1);
|
| /src/external/gpl3/gdb.old/dist/sim/iq2000/ |
| iq2000.c | 65 const int ret_reg = 2; local
88 SET_H_GR (ret_reg,
95 SET_H_GR (ret_reg,
107 SET_H_GR (ret_reg,
117 SET_H_GR (ret_reg,
124 SET_H_GR (ret_reg,
129 SET_H_GR (ret_reg, time (0));
133 SET_H_GR (ret_reg, -1);
|
| iq2000.c | 65 const int ret_reg = 2; local
88 SET_H_GR (ret_reg,
95 SET_H_GR (ret_reg,
107 SET_H_GR (ret_reg,
117 SET_H_GR (ret_reg,
124 SET_H_GR (ret_reg,
129 SET_H_GR (ret_reg, time (0));
133 SET_H_GR (ret_reg, -1);
|
| /src/external/gpl3/gcc/dist/libgcc/config/c6x/ |
| pr-support.c | 270 int ret_reg = unwind_frame_regs[data & 0xf]; local
272 if (ret_reg != R_B3)
|
| pr-support.c | 270 int ret_reg = unwind_frame_regs[data & 0xf]; local
272 if (ret_reg != R_B3)
|
| /src/external/gpl3/gcc.old/dist/gcc/ |
| mode-switching.cc | 247 rtx ret_reg;
270 && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG)
272 int ret_start = REGNO (ret_reg);
273 int nregs = REG_NREGS (ret_reg);
458 || nregs != REG_NREGS (ret_reg)
465 || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT
246 rtx ret_reg; local
|
| mode-switching.cc | 247 rtx ret_reg;
270 && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG)
272 int ret_start = REGNO (ret_reg);
273 int nregs = REG_NREGS (ret_reg);
458 || nregs != REG_NREGS (ret_reg)
465 || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT
246 rtx ret_reg; local
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/c6x/ |
| pr-support.c | 270 int ret_reg = unwind_frame_regs[data & 0xf]; local
272 if (ret_reg != R_B3)
|
| pr-support.c | 270 int ret_reg = unwind_frame_regs[data & 0xf]; local
272 if (ret_reg != R_B3)
|
| /src/external/gpl3/gcc/dist/gcc/ |
| mode-switching.cc | 235 rtx ret_reg;
258 && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG)
263 int ret_start = REGNO (ret_reg);
264 int nregs = REG_NREGS (ret_reg);
457 || nregs != REG_NREGS (ret_reg)
464 || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT
234 rtx ret_reg; local
|
| mode-switching.cc | 235 rtx ret_reg;
258 && GET_CODE ((ret_reg = XEXP (PATTERN (last_insn), 0))) == REG)
263 int ret_start = REGNO (ret_reg);
264 int nregs = REG_NREGS (ret_reg);
457 || nregs != REG_NREGS (ret_reg)
464 || (GET_MODE_CLASS (GET_MODE (ret_reg)) != MODE_INT
234 rtx ret_reg; local
|
| /src/external/gpl3/gcc/dist/gcc/analyzer/ |
| kf.cc | 159 const region *ret_reg = model->deref_rvalue (ret_sval, ret_tree, ctxt); variable
166 model->write_bytes (ret_reg, num_bytes_sval, tmp_a_sval, ctxt);
|
| kf.cc | 159 const region *ret_reg = model->deref_rvalue (ret_sval, ret_tree, ctxt); variable
166 model->write_bytes (ret_reg, num_bytes_sval, tmp_a_sval, ctxt);
|
| region-model.cc | 2207 const region *ret_reg = get_lvalue (lhs, ctxt); local
2208 set_value (ret_reg, sval, ctxt);
|
| /src/external/gpl3/gdb/dist/gdb/ |
| ia64-tdep.c | 1372 int ret_reg = 0; local
1472 (frameless || ret_reg != 0))
1487 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1489 ret_reg = rN;
1763 if (i+32 == ret_reg)
|
| ia64-tdep.c | 1372 int ret_reg = 0; local
1472 (frameless || ret_reg != 0))
1487 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1489 ret_reg = rN;
1763 if (i+32 == ret_reg)
|
| /src/external/gpl3/gdb.old/dist/gdb/ |
| ia64-tdep.c | 1372 int ret_reg = 0; local
1472 (frameless || ret_reg != 0))
1487 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1489 ret_reg = rN;
1763 if (i+32 == ret_reg)
|
| ia64-tdep.c | 1372 int ret_reg = 0; local
1472 (frameless || ret_reg != 0))
1487 if (qp == 0 && b2 == 0 && rN >= 32 && ret_reg == 0)
1489 ret_reg = rN;
1763 if (i+32 == ret_reg)
|
| /src/external/gpl3/gcc/dist/gcc/config/sparc/ |
| sparc.cc | 7746 rtx ret_reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
7764 ret_reg, 8)));
7766 emit_insn (gen_add3_insn (ret_reg, ret_reg, GEN_INT (4)));
7769 emit_insn (gen_sub3_insn (ret_reg, ret_reg, GEN_INT (4)));
7735 rtx ret_reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM); local
|
| sparc.cc | 7746 rtx ret_reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
7764 ret_reg, 8)));
7766 emit_insn (gen_add3_insn (ret_reg, ret_reg, GEN_INT (4)));
7769 emit_insn (gen_sub3_insn (ret_reg, ret_reg, GEN_INT (4)));
7735 rtx ret_reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM); local
|
| /src/external/gpl3/gcc.old/dist/gcc/analyzer/ |
| region-model.cc | 1933 const region *ret_reg = get_lvalue (lhs, ctxt); local
1934 set_value (ret_reg, sval, ctxt);
|
| region-model.cc | 1933 const region *ret_reg = get_lvalue (lhs, ctxt); local
1934 set_value (ret_reg, sval, ctxt);
|
| /src/external/gpl3/gcc.old/dist/gcc/config/sparc/ |
| sparc.cc | 7731 rtx ret_reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
7749 ret_reg, 8)));
7751 emit_insn (gen_add3_insn (ret_reg, ret_reg, GEN_INT (4)));
7754 emit_insn (gen_sub3_insn (ret_reg, ret_reg, GEN_INT (4)));
7720 rtx ret_reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM); local
|
| sparc.cc | 7731 rtx ret_reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
7749 ret_reg, 8)));
7751 emit_insn (gen_add3_insn (ret_reg, ret_reg, GEN_INT (4)));
7754 emit_insn (gen_sub3_insn (ret_reg, ret_reg, GEN_INT (4)));
7720 rtx ret_reg = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM); local
|
