/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_gfx_v10_0.c | 1806 tmp = REG_SET_FIELD(tmp, RLC_CNTL, RLC_ENABLE_F32, 0); 1847 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); 4006 uint32_t rlc_cntl; local in function:gfx_v10_0_is_rlc_enabled 4009 rlc_cntl = RREG32_SOC15(GC, 0, mmRLC_CNTL); 4010 return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false;
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amdgpu_gfx_v10_0.c | 1806 tmp = REG_SET_FIELD(tmp, RLC_CNTL, RLC_ENABLE_F32, 0); 1847 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); 4006 uint32_t rlc_cntl; local in function:gfx_v10_0_is_rlc_enabled 4009 rlc_cntl = RREG32_SOC15(GC, 0, mmRLC_CNTL); 4010 return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false;
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