/src/tests/kernel/arch/hppa/ |
execregs.c | 169 long sar = nonnull(0x8a); /* cr11 */ local in function:execregschild 222 __asm volatile("mtctl %[sar], %%sar" /* cr11 */ 224 : [sar] "r"(sar) 277 long sar = nonnull(0x8a); /* cr11 */ local in function:spawnregschild 344 __asm volatile("mtctl %[sar], %%sar" /* cr11 */ 346 : [sar] "r"(sar) [all...] |
execregs.c | 169 long sar = nonnull(0x8a); /* cr11 */ local in function:execregschild 222 __asm volatile("mtctl %[sar], %%sar" /* cr11 */ 224 : [sar] "r"(sar) 277 long sar = nonnull(0x8a); /* cr11 */ local in function:spawnregschild 344 __asm volatile("mtctl %[sar], %%sar" /* cr11 */ 346 : [sar] "r"(sar) [all...] |
/src/sys/arch/arm/imx/ |
imxpwm.c | 88 uint32_t cr, sar, pr; local in function:imxpwm_get_config 91 sar = PWM_READ(sc, PWM_SAR); 98 const u_int act_cycles = __SHIFTOUT(sar, PWM_SAR_SAMPLE); 111 uint32_t cr, sar, pr; local in function:imxpwm_set_config 133 sar = __SHIFTIN(act_cycles, PWM_PR_PERIOD); 135 PWM_WRITE(sc, PWM_SAR, sar);
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imxpwm.c | 88 uint32_t cr, sar, pr; local in function:imxpwm_get_config 91 sar = PWM_READ(sc, PWM_SAR); 98 const u_int act_cycles = __SHIFTOUT(sar, PWM_SAR_SAMPLE); 111 uint32_t cr, sar, pr; local in function:imxpwm_set_config 133 sar = __SHIFTIN(act_cycles, PWM_PR_PERIOD); 135 PWM_WRITE(sc, PWM_SAR, sar);
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/src/sys/arch/arm/marvell/ |
armadaxp.c | 64 #define EXTRACT_XP_CPU_FREQ_FIELD(sar) (((0x01 & (sar >> 52)) << 3) | \ 65 (0x07 & (sar >> 21))) 66 #define EXTRACT_XP_FAB_FREQ_FIELD(sar) (((0x01 & (sar >> 51)) << 4) | \ 67 (0x0F & (sar >> 24))) 68 #define EXTRACT_370_CPU_FREQ_FIELD(sar) ((sar >> 11) & 0xf) 69 #define EXTRACT_370_FAB_FREQ_FIELD(sar) ((sar >> 15) & 0x1f 842 uint32_t sar; local in function:armada370_getclks [all...] |
armadaxp.c | 64 #define EXTRACT_XP_CPU_FREQ_FIELD(sar) (((0x01 & (sar >> 52)) << 3) | \ 65 (0x07 & (sar >> 21))) 66 #define EXTRACT_XP_FAB_FREQ_FIELD(sar) (((0x01 & (sar >> 51)) << 4) | \ 67 (0x0F & (sar >> 24))) 68 #define EXTRACT_370_CPU_FREQ_FIELD(sar) ((sar >> 11) & 0xf) 69 #define EXTRACT_370_FAB_FREQ_FIELD(sar) ((sar >> 15) & 0x1f 842 uint32_t sar; local in function:armada370_getclks [all...] |
/src/sys/lib/libkern/arch/hppa/ |
milli.S | 189 sar: .equ 11 ; Shift Amount Register label
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milli.S | 189 sar: .equ 11 ; Shift Amount Register label
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