| /src/sys/arch/arm/xscale/ |
| iopi2cvar.h | 49 uint32_t sc_icr; member in struct:iopiic_softc
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| iopi2cvar.h | 49 uint32_t sc_icr; member in struct:iopiic_softc
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| pxa2x0_i2c.h | 33 uint32_t sc_icr; member in struct:pxa2x0_i2c_softc
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| pxa2x0_i2c.h | 33 uint32_t sc_icr; member in struct:pxa2x0_i2c_softc
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| /src/sys/dev/mvme/ |
| lptvar.h | 67 u_char sc_icr; member in struct:lpt_softc
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| lptvar.h | 67 u_char sc_icr; member in struct:lpt_softc
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| /src/sys/dev/pci/ |
| if_dge.c | 325 uint32_t sc_icr; /* prototype interrupt bits */ member in struct:dge_softc
1526 if ((icr & sc->sc_icr) == 0)
2008 sc->sc_icr = ICR_TXDW | ICR_LSC | ICR_RXSEQ | ICR_RXDMT0 |
2011 CSR_WRITE(sc, DGE_IMS, sc->sc_icr);
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| if_dge.c | 325 uint32_t sc_icr; /* prototype interrupt bits */ member in struct:dge_softc
1526 if ((icr & sc->sc_icr) == 0)
2008 sc->sc_icr = ICR_TXDW | ICR_LSC | ICR_RXSEQ | ICR_RXDMT0 |
2011 CSR_WRITE(sc, DGE_IMS, sc->sc_icr);
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| if_wm.c | 700 uint32_t sc_icr; /* prototype interrupt bits */ member in struct:wm_softc
7450 sc->sc_icr = ICR_TXDW | ICR_LSC | ICR_RXSEQ | ICR_RXDMT0 |
7452 CSR_WRITE(sc, WMREG_IMS, sc->sc_icr);
7679 * Clear sc->sc_icr to ensure wm_intr_legacy() makes no attempt to
7683 sc->sc_icr = 0;
10891 CSR_WRITE(sc, WMREG_IMS, sc->sc_icr);
10913 if ((icr & sc->sc_icr) == 0)
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| if_wm.c | 700 uint32_t sc_icr; /* prototype interrupt bits */ member in struct:wm_softc
7450 sc->sc_icr = ICR_TXDW | ICR_LSC | ICR_RXSEQ | ICR_RXDMT0 |
7452 CSR_WRITE(sc, WMREG_IMS, sc->sc_icr);
7679 * Clear sc->sc_icr to ensure wm_intr_legacy() makes no attempt to
7683 sc->sc_icr = 0;
10891 CSR_WRITE(sc, WMREG_IMS, sc->sc_icr);
10913 if ((icr & sc->sc_icr) == 0)
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