NetBSD Cross-Reference & Source Code Search Engine

Home	Sort by: relevance \| last modified time \| path

Full Search

in project(s):

Definition

Symbol

File Path

History

| | Help

Searched defs:sdma_rlc_reg_offset (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_arcturus.c	80 uint32_t sdma_rlc_reg_offset; local in function:get_sdma_rlc_reg_offset 122 sdma_rlc_reg_offset = sdma_engine_reg_base 126 queue_id, sdma_rlc_reg_offset); 128 return sdma_rlc_reg_offset; 136 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 143 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id, 146 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 151 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 161 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET, 166 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data) 206 uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, local in function:kgd_hqd_sdma_dump 237 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 257 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_arcturus.c	80 uint32_t sdma_rlc_reg_offset; local in function:get_sdma_rlc_reg_offset 122 sdma_rlc_reg_offset = sdma_engine_reg_base 126 queue_id, sdma_rlc_reg_offset); 128 return sdma_rlc_reg_offset; 136 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 143 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id, 146 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 151 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 161 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET, 166 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data) 206 uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, local in function:kgd_hqd_sdma_dump 237 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 257 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_gfx_v10.c	434 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 441 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id, 444 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 449 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 459 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET, 464 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data); 465 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR, 467 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI, 470 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); 472 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR 504 uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, local in function:kgd_hqd_sdma_dump 557 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 685 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_gfx_v8.c	317 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 321 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(m); 322 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 327 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 339 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data); 340 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR, 344 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, data); 346 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, 349 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_VIRTUAL_ADDR, 351 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base) 428 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 552 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_gfx_v9.c	422 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 429 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id, 432 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 437 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 447 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET, 452 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data); 453 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR, 455 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI, 458 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); 460 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR 492 uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, local in function:kgd_hqd_sdma_dump 545 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 615 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_gfx_v10.c	434 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 441 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id, 444 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 449 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 459 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET, 464 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data); 465 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR, 467 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI, 470 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); 472 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR 504 uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, local in function:kgd_hqd_sdma_dump 557 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 685 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_gfx_v8.c	317 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 321 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(m); 322 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 327 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 339 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data); 340 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR, 344 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, data); 346 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, 349 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_VIRTUAL_ADDR, 351 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base) 428 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 552 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_gfx_v9.c	422 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 429 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id, 432 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 437 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 447 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET, 452 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data); 453 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR, 455 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI, 458 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); 460 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR 492 uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, local in function:kgd_hqd_sdma_dump 545 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 615 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_gfx_v7.c	330 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 334 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(m); 336 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 341 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 353 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data); 354 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR, 358 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, data); 360 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, 363 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_VIRTUAL_ADDR, 365 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdma_rlc_rb_base) 433 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 554 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]
amdgpu_amdkfd_gfx_v7.c	330 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_load 334 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(m); 336 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, 341 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS); 353 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data); 354 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR, 358 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, data); 360 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, 363 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_VIRTUAL_ADDR, 365 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdma_rlc_rb_base) 433 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_is_occupied 554 uint32_t sdma_rlc_reg_offset; local in function:kgd_hqd_sdma_destroy [all...]

Completed in 26 milliseconds