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  /src/lib/libc/compat/sys/
compat_select.c 43 #include <sys/select.h>
44 #include <compat/sys/select.h>
50 __warn_references(select,
51 "warning: reference to compatibility select(); include <sys/select.h> to generate correct reference")
53 "warning: reference to compatibility pselect(); include <sys/select.h> to generate correct reference")
56 __weak_alias(select, _select)
78 select(int nfds, fd_set * __restrict readfds, fd_set * __restrict writefds, function
compat_select.c 43 #include <sys/select.h>
44 #include <compat/sys/select.h>
50 __warn_references(select,
51 "warning: reference to compatibility select(); include <sys/select.h> to generate correct reference")
53 "warning: reference to compatibility pselect(); include <sys/select.h> to generate correct reference")
56 __weak_alias(select, _select)
78 select(int nfds, fd_set * __restrict readfds, fd_set * __restrict writefds, function
  /src/lib/libc/rpc/
svc_fdset.h 17 # undef select macro
18 # define select(a, b, c, d, e) rump_sys_select(a, b, c, d, e) macro
svc_fdset.h 17 # undef select macro
18 # define select(a, b, c, d, e) rump_sys_select(a, b, c, d, e) macro
  /src/sys/arch/hpcmips/tx/
tx39iovar.h 38 txreg_t select; /* MFIO */ member in union:tx39io_port_status::__anon1400
tx39iovar.h 38 txreg_t select; /* MFIO */ member in union:tx39io_port_status::__anon1400
  /src/sys/arch/vax/boot/boot/
data.h 44 long select; /* 4 Selection entry */ member in struct:bqo
data.h 44 long select; /* 4 Selection entry */ member in struct:bqo
  /src/usr.bin/vmstat/
drvstats.h 41 int *select; /* Display stats for selected disks. */ member in struct:_drive
drvstats.h 41 int *select; /* Display stats for selected disks. */ member in struct:_drive
  /src/sbin/mount_qemufwcfg/
virtdir.h 46 uint16_t select; /* selector */ member in struct:virt_dirent_t
virtdir.h 46 uint16_t select; /* selector */ member in struct:virt_dirent_t
fwcfg.c 55 uint16_t select; member in struct:fwcfg_file
152 if (ep->select == 0)
155 set_index(ep->select);
211 be32toh(f.size), be16toh(f.select));
fwcfg.c 55 uint16_t select; member in struct:fwcfg_file
152 if (ep->select == 0)
155 set_index(ep->select);
211 be32toh(f.size), be16toh(f.select));
  /src/tests/lib/libc/gen/
t_sleep.c 114 if (select(0, NULL, NULL, NULL, &tv) == -1)
206 ATF_TC(select); variable
207 ATF_TC_HEAD(select, tc)
210 atf_tc_set_md_var(tc, "descr", "Test select(2) timing");
214 ATF_TC_BODY(select, tc)
370 ATF_TP_ADD_TC(tp, select);
t_sleep.c 114 if (select(0, NULL, NULL, NULL, &tv) == -1)
206 ATF_TC(select); variable
207 ATF_TC_HEAD(select, tc)
210 atf_tc_set_md_var(tc, "descr", "Test select(2) timing");
214 ATF_TC_BODY(select, tc)
370 ATF_TP_ADD_TC(tp, select);
  /src/sys/dev/ic/
wdcvar.h 119 /* Optional callback to select drive. */
120 void (*select)(struct ata_channel *,int); member in struct:wdc_softc
wdcvar.h 119 /* Optional callback to select drive. */
120 void (*select)(struct ata_channel *,int); member in struct:wdc_softc
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_transform_v.c 302 uint32_t select = 0; local
325 set_reg_field_value(select, filter_type, SCLV_COEF_RAM_SELECT, SCL_C_RAM_FILTER_TYPE);
330 set_reg_field_value(select, phase, SCLV_COEF_RAM_SELECT, SCL_C_RAM_PHASE);
334 set_reg_field_value(select, pair,
337 dm_write_reg(ctx, mmSCLV_COEF_RAM_SELECT, select);
amdgpu_dce110_transform_v.c 302 uint32_t select = 0; local
325 set_reg_field_value(select, filter_type, SCLV_COEF_RAM_SELECT, SCL_C_RAM_FILTER_TYPE);
330 set_reg_field_value(select, phase, SCLV_COEF_RAM_SELECT, SCL_C_RAM_PHASE);
334 set_reg_field_value(select, pair,
337 dm_write_reg(ctx, mmSCLV_COEF_RAM_SELECT, select);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_dpp.c 305 enum dcn10_input_csc_select select; local
316 select = INPUT_CSC_SELECT_BYPASS;
362 select = INPUT_CSC_SELECT_ICSC;
368 select = INPUT_CSC_SELECT_ICSC;
374 select = INPUT_CSC_SELECT_ICSC;
380 select = INPUT_CSC_SELECT_ICSC;
412 select = INPUT_CSC_SELECT_ICSC;
414 select = INPUT_CSC_SELECT_BYPASS;
416 dpp1_program_input_csc(dpp_base, color_space, select, &tbl_entry);
418 dpp1_program_input_csc(dpp_base, color_space, select, NULL)
    [all...]
amdgpu_dcn10_dpp.c 305 enum dcn10_input_csc_select select; local
316 select = INPUT_CSC_SELECT_BYPASS;
362 select = INPUT_CSC_SELECT_ICSC;
368 select = INPUT_CSC_SELECT_ICSC;
374 select = INPUT_CSC_SELECT_ICSC;
380 select = INPUT_CSC_SELECT_ICSC;
412 select = INPUT_CSC_SELECT_ICSC;
414 select = INPUT_CSC_SELECT_BYPASS;
416 dpp1_program_input_csc(dpp_base, color_space, select, &tbl_entry);
418 dpp1_program_input_csc(dpp_base, color_space, select, NULL)
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dpp.c 112 enum dcn20_input_csc_select select = DCN2_ICSC_SELECT_BYPASS; local
153 select = DCN2_ICSC_SELECT_ICSC_A;
159 select = DCN2_ICSC_SELECT_ICSC_A;
165 select = DCN2_ICSC_SELECT_ICSC_A;
171 select = DCN2_ICSC_SELECT_ICSC_A;
185 select = DCN2_ICSC_SELECT_ICSC_A;
196 select = DCN2_ICSC_SELECT_ICSC_A;
202 select = DCN2_ICSC_SELECT_ICSC_A;
235 select = DCN2_ICSC_SELECT_ICSC_A;
237 select = DCN2_ICSC_SELECT_BYPASS
    [all...]
amdgpu_dcn20_dpp.c 112 enum dcn20_input_csc_select select = DCN2_ICSC_SELECT_BYPASS; local
153 select = DCN2_ICSC_SELECT_ICSC_A;
159 select = DCN2_ICSC_SELECT_ICSC_A;
165 select = DCN2_ICSC_SELECT_ICSC_A;
171 select = DCN2_ICSC_SELECT_ICSC_A;
185 select = DCN2_ICSC_SELECT_ICSC_A;
196 select = DCN2_ICSC_SELECT_ICSC_A;
202 select = DCN2_ICSC_SELECT_ICSC_A;
235 select = DCN2_ICSC_SELECT_ICSC_A;
237 select = DCN2_ICSC_SELECT_BYPASS
    [all...]
  /src/sys/external/isc/atheros_hal/dist/ar5210/
ar5210_misc.c 143 int select = MS(rfsilent, AR_EEPROM_RFSILENT_GPIO_SEL); local
154 ar5210Gpio0SetIntr(ah, select, (ar5210GpioGet(ah, select) == polarity));

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