| /src/external/gpl3/gcc.old/dist/gcc/config/nds32/ |
| nds32-md-auxiliary.cc | 319 rtx new_shift_amout, select_reg; local
325 select_reg = gen_reg_rtx (SImode);
370 emit_insn (gen_slt_compare (select_reg, shiftamount, GEN_INT (32)));
372 emit_insn (gen_cmovnsi (dst_low_part, select_reg,
374 emit_insn (gen_cmovnsi (dst_high_part, select_reg,
3295 rtx new_shift_amout, select_reg; local
3301 select_reg = gen_reg_rtx (SImode);
3341 emit_insn (gen_andsi3 (select_reg, shiftamount, GEN_INT (32)));
3343 emit_insn (gen_cmovzsi (dst_low_part, select_reg,
3345 emit_insn (gen_cmovzsi (dst_high_part, select_reg,
3367 rtx select_reg, low5bit, low5bit_inv, minus32sa; local
[all...] |
| nds32-md-auxiliary.cc | 319 rtx new_shift_amout, select_reg; local
325 select_reg = gen_reg_rtx (SImode);
370 emit_insn (gen_slt_compare (select_reg, shiftamount, GEN_INT (32)));
372 emit_insn (gen_cmovnsi (dst_low_part, select_reg,
374 emit_insn (gen_cmovnsi (dst_high_part, select_reg,
3295 rtx new_shift_amout, select_reg; local
3301 select_reg = gen_reg_rtx (SImode);
3341 emit_insn (gen_andsi3 (select_reg, shiftamount, GEN_INT (32)));
3343 emit_insn (gen_cmovzsi (dst_low_part, select_reg,
3345 emit_insn (gen_cmovzsi (dst_high_part, select_reg,
3367 rtx select_reg, low5bit, low5bit_inv, minus32sa; local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/nds32/ |
| nds32-md-auxiliary.cc | 319 rtx new_shift_amout, select_reg; local
325 select_reg = gen_reg_rtx (SImode);
370 emit_insn (gen_slt_compare (select_reg, shiftamount, GEN_INT (32)));
372 emit_insn (gen_cmovnsi (dst_low_part, select_reg,
374 emit_insn (gen_cmovnsi (dst_high_part, select_reg,
3295 rtx new_shift_amout, select_reg; local
3301 select_reg = gen_reg_rtx (SImode);
3341 emit_insn (gen_andsi3 (select_reg, shiftamount, GEN_INT (32)));
3343 emit_insn (gen_cmovzsi (dst_low_part, select_reg,
3345 emit_insn (gen_cmovzsi (dst_high_part, select_reg,
3367 rtx select_reg, low5bit, low5bit_inv, minus32sa; local
[all...] |
| nds32-md-auxiliary.cc | 319 rtx new_shift_amout, select_reg; local
325 select_reg = gen_reg_rtx (SImode);
370 emit_insn (gen_slt_compare (select_reg, shiftamount, GEN_INT (32)));
372 emit_insn (gen_cmovnsi (dst_low_part, select_reg,
374 emit_insn (gen_cmovnsi (dst_high_part, select_reg,
3295 rtx new_shift_amout, select_reg; local
3301 select_reg = gen_reg_rtx (SImode);
3341 emit_insn (gen_andsi3 (select_reg, shiftamount, GEN_INT (32)));
3343 emit_insn (gen_cmovzsi (dst_low_part, select_reg,
3345 emit_insn (gen_cmovzsi (dst_high_part, select_reg,
3367 rtx select_reg, low5bit, low5bit_inv, minus32sa; local
[all...] |
