| /src/external/gpl3/gcc/dist/gcc/config/riscv/ |
| thead.cc | 79 unsigned shamt = (mode == DImode) ? 4 : 3; local 117 HOST_WIDE_INT imm2 = offset1 >> shamt; 121 gcc_assert ((imm2 << shamt) == offset1); 137 output_operands[4] = gen_rtx_CONST_INT (mode, shamt); 203 unsigned shamt = (mem_mode == DImode) ? 4 : 3; local 208 HOST_WIDE_INT imm2 = offset >> shamt; 213 if ((imm2 << shamt) != offset) 485 for (int shamt = 0; shamt < (1 << shamt_bits); shamt++ [all...] |
| thead.cc | 79 unsigned shamt = (mode == DImode) ? 4 : 3; local 117 HOST_WIDE_INT imm2 = offset1 >> shamt; 121 gcc_assert ((imm2 << shamt) == offset1); 137 output_operands[4] = gen_rtx_CONST_INT (mode, shamt); 203 unsigned shamt = (mem_mode == DImode) ? 4 : 3; local 208 HOST_WIDE_INT imm2 = offset >> shamt; 213 if ((imm2 << shamt) != offset) 485 for (int shamt = 0; shamt < (1 << shamt_bits); shamt++ [all...] |
| /src/external/gpl3/gdb/dist/sim/arm/ |
| armemu.c | 4795 ARMword shamt, base; local 4810 shamt = state->Reg[BITS (8, 11)] & 0xff; 4814 if (shamt == 0) 4816 else if (shamt >= 32) 4819 return (base << shamt); 4821 if (shamt == 0) 4823 else if (shamt >= 32) 4826 return (base >> shamt); 4828 if (shamt == 0) 4830 else if (shamt >= 32 4886 ARMword shamt, base; local 5138 ARMword shamt, base; local [all...] |
| armemu.c | 4795 ARMword shamt, base; local 4810 shamt = state->Reg[BITS (8, 11)] & 0xff; 4814 if (shamt == 0) 4816 else if (shamt >= 32) 4819 return (base << shamt); 4821 if (shamt == 0) 4823 else if (shamt >= 32) 4826 return (base >> shamt); 4828 if (shamt == 0) 4830 else if (shamt >= 32 4886 ARMword shamt, base; local 5138 ARMword shamt, base; local [all...] |
| /src/external/gpl3/gdb.old/dist/sim/arm/ |
| armemu.c | 4795 ARMword shamt, base; local 4810 shamt = state->Reg[BITS (8, 11)] & 0xff; 4814 if (shamt == 0) 4816 else if (shamt >= 32) 4819 return (base << shamt); 4821 if (shamt == 0) 4823 else if (shamt >= 32) 4826 return (base >> shamt); 4828 if (shamt == 0) 4830 else if (shamt >= 32 4886 ARMword shamt, base; local 5138 ARMword shamt, base; local [all...] |
| armemu.c | 4795 ARMword shamt, base; local 4810 shamt = state->Reg[BITS (8, 11)] & 0xff; 4814 if (shamt == 0) 4816 else if (shamt >= 32) 4819 return (base << shamt); 4821 if (shamt == 0) 4823 else if (shamt >= 32) 4826 return (base >> shamt); 4828 if (shamt == 0) 4830 else if (shamt >= 32 4886 ARMword shamt, base; local 5138 ARMword shamt, base; local [all...] |
| /src/sys/arch/mips/include/ |
| mips_opcode.h | 66 unsigned shamt: 5; member in struct:__anon1665::__anon1668 111 unsigned shamt: 5; member in struct:__anon1665::__anon1673
|
| mips_opcode.h | 66 unsigned shamt: 5; member in struct:__anon1665::__anon1668 111 unsigned shamt: 5; member in struct:__anon1665::__anon1673
|