| /src/external/bsd/nsd/dist/simdzone/src/westmere/ |
| ip4.h | 158 __m128i shuf = _mm_loadu_si128((const __m128i *)pattern_ptr); local
159 v = _mm_shuffle_epi8(v, shuf);
169 __m128i check_lz = _mm_xor_si128(_mm_cmpeq_epi8(_mm_setzero_si128(), v), shuf);
|
| ip4.h | 158 __m128i shuf = _mm_loadu_si128((const __m128i *)pattern_ptr); local
159 v = _mm_shuffle_epi8(v, shuf);
169 __m128i check_lz = _mm_xor_si128(_mm_cmpeq_epi8(_mm_setzero_si128(), v), shuf);
|
| /src/external/bsd/nsd/dist/ |
| radtree.c | 698 unsigned idx, shuf = 0; local
700 while(shuf < n->len && n->array[shuf].node == NULL)
701 shuf++;
702 if(shuf == 0)
704 if(shuf == n->len) {
709 assert(shuf < n->len);
710 assert((int)shuf <= 255-(int)n->offset);
711 memmove(&n->array[0], &n->array[shuf],
712 (n->len - shuf)*sizeof(struct radsel))
727 unsigned shuf = 0; local
[all...] |
| radtree.c | 698 unsigned idx, shuf = 0; local
700 while(shuf < n->len && n->array[shuf].node == NULL)
701 shuf++;
702 if(shuf == 0)
704 if(shuf == n->len) {
709 assert(shuf < n->len);
710 assert((int)shuf <= 255-(int)n->offset);
711 memmove(&n->array[0], &n->array[shuf],
712 (n->len - shuf)*sizeof(struct radsel))
727 unsigned shuf = 0; local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/spu/ |
| spu.c | 4756 aligned reg + aligned reg => lqx, c?x, shuf, stqx
4757 aligned reg + unaligned reg => lqx, c?x, shuf, stqx
4758 aligned reg + aligned const => lqd, c?d, shuf, stqx
4759 aligned reg + unaligned const => lqd, c?d, shuf, stqx
4760 unaligned reg + aligned reg => lqx, c?x, shuf, stqx
4761 unaligned reg + unaligned reg => lqx, c?x, shuf, stqx
4762 unaligned reg + aligned const => lqd, c?d, shuf, stqx
4763 unaligned reg + unaligned const -> lqx, c?d, shuf, stqx
5674 rtx shuf;
5682 shuf
5663 rtx shuf; local
5840 rtx shuf = gen_reg_rtx (V4SImode); local
[all...] |
| spu.c | 4756 aligned reg + aligned reg => lqx, c?x, shuf, stqx
4757 aligned reg + unaligned reg => lqx, c?x, shuf, stqx
4758 aligned reg + aligned const => lqd, c?d, shuf, stqx
4759 aligned reg + unaligned const => lqd, c?d, shuf, stqx
4760 unaligned reg + aligned reg => lqx, c?x, shuf, stqx
4761 unaligned reg + unaligned reg => lqx, c?x, shuf, stqx
4762 unaligned reg + aligned const => lqd, c?d, shuf, stqx
4763 unaligned reg + unaligned const -> lqx, c?d, shuf, stqx
5674 rtx shuf;
5682 shuf
5663 rtx shuf; local
5840 rtx shuf = gen_reg_rtx (V4SImode); local
[all...] |
