/src/sys/arch/mips/cavium/dev/ |
octeon_smi.c | 225 uint64_t smi_wr; local in function:octsmi_write 228 smi_wr = 0; 229 SET(smi_wr, value); 230 _SMI_WR8(sc, SMI_WR_DAT_OFFSET, smi_wr); 238 smi_wr = _SMI_RD8(sc, SMI_WR_DAT_OFFSET); 239 while (ISSET(smi_wr, SMI_WR_DAT_PENDING)) { 244 smi_wr = _SMI_RD8(sc, SMI_WR_DAT_OFFSET); 246 if (ISSET(smi_wr, SMI_WR_DAT_PENDING)) {
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octeon_smi.c | 225 uint64_t smi_wr; local in function:octsmi_write 228 smi_wr = 0; 229 SET(smi_wr, value); 230 _SMI_WR8(sc, SMI_WR_DAT_OFFSET, smi_wr); 238 smi_wr = _SMI_RD8(sc, SMI_WR_DAT_OFFSET); 239 while (ISSET(smi_wr, SMI_WR_DAT_PENDING)) { 244 smi_wr = _SMI_RD8(sc, SMI_WR_DAT_OFFSET); 246 if (ISSET(smi_wr, SMI_WR_DAT_PENDING)) {
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