| /src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
| i915_gem_object_blt.c | 212 u64 src_offset, dst_offset; local in function:intel_emit_vma_copy_blt
238 src_offset = src->node.start;
254 *cmd++ = lower_32_bits(src_offset);
255 *cmd++ = upper_32_bits(src_offset);
265 *cmd++ = lower_32_bits(src_offset);
266 *cmd++ = upper_32_bits(src_offset);
273 *cmd++ = src_offset;
279 src_offset += size;
|
| /src/sys/external/bsd/drm2/dist/drm/qxl/ |
| qxl_ioctl.c | 84 int src_offset; member in struct:qxl_reloc_info
100 info->src_offset);
250 reloc_info[i].src_offset = reloc.src_offset;
253 reloc_info[i].src_offset = 0;
|
| /src/sys/external/bsd/drm2/dist/include/uapi/drm/ |
| qxl_drm.h | 70 * src_offset)
76 __u64 src_offset; /* offset into src_handle or src buffer */ member in struct:drm_qxl_reloc
|
| /src/sys/external/bsd/drm/dist/shared-core/ |
| r600_cp.c | 2372 u64 src_offset, dst_offset; local in function:r600_cp_dispatch_texture
2420 src_offset = dev_priv->gart_buffers_offset + buf->offset;
2422 r600_blit_copy(dev, src_offset, dst_offset, pass_size);
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen_cs.c | 2833 u64 src_offset, dst_offset, dst2_offset; local in function:evergreen_dma_cs_parse
2898 src_offset = radeon_get_ib_value(p, idx+2);
2899 src_offset |= ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32;
2902 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
2904 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
2923 src_offset = radeon_get_ib_value(p, idx+1);
2924 src_offset <<= 8;
2933 src_offset = radeon_get_ib_value(p, idx+7);
2934 src_offset |= ((u64)(radeon_get_ib_value(p, idx+8) & 0xff)) << 32;
2942 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj))
[all...] |
| radeon_r600_cs.c | 2386 u64 src_offset, dst_offset; local in function:r600_dma_cs_parse
2444 src_offset = radeon_get_ib_value(p, idx+1);
2445 src_offset <<= 8;
2454 src_offset = radeon_get_ib_value(p, idx+5);
2455 src_offset |= ((u64)(radeon_get_ib_value(p, idx+6) & 0xff)) << 32;
2466 src_offset = radeon_get_ib_value(p, idx+2);
2467 src_offset |= ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32;
2477 src_offset = radeon_get_ib_value(p, idx+2);
2478 src_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff)) << 32;
2489 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj))
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/vmwgfx/ |
| vmwgfx_stdu.c | 585 u32 src_offset, dst_offset; local in function:vmw_stdu_bo_cpu_commit
604 src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
610 swap(src_offset, dst_offset);
614 src_bo, src_offset, src_pitch,
1302 u32 src_offset, dst_offset; local in function:vmw_stdu_bo_populate_update_cpu
1321 src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
1325 src_offset, src_pitch, width * stdu->cpp, height,
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| nouveau_bo.c | 876 u64 src_offset = mem->vma[0].addr; local in function:nvc0_bo_move_copy
890 OUT_RING (chan, upper_32_bits(src_offset));
891 OUT_RING (chan, lower_32_bits(src_offset));
902 src_offset += (PAGE_SIZE * line_count);
914 u64 src_offset = mem->vma[0].addr; local in function:nvc0_bo_move_m2mf
931 OUT_RING (chan, upper_32_bits(src_offset));
932 OUT_RING (chan, lower_32_bits(src_offset));
941 src_offset += (PAGE_SIZE * line_count);
953 u64 src_offset = mem->vma[0].addr; local in function:nva3_bo_move_copy
967 OUT_RING (chan, upper_32_bits(src_offset));
1044 u64 src_offset = mem->vma[0].addr; local in function:nv50_bo_move_m2mf
1138 u32 src_offset = old_reg->start << PAGE_SHIFT; local in function:nv04_bo_move_m2mf
[all...] |
