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Searched defs:syscrg (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/starfive/
jh7110.dtsi	65 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 98 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 131 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 164 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 392 clocks = <&syscrg JH7110_SYSCLK_UART0_CORE>, 393 <&syscrg JH7110_SYSCLK_UART0_APB>; 395 resets = <&syscrg JH7110_SYSRST_UART0_APB>, 396 <&syscrg JH7110_SYSRST_UART0_CORE>; 406 clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>, 407 <&syscrg JH7110_SYSCLK_UART1_APB> 878 syscrg: clock-controller@13020000 { label [all...]
jh7110.dtsi	65 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 98 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 131 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 164 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 392 clocks = <&syscrg JH7110_SYSCLK_UART0_CORE>, 393 <&syscrg JH7110_SYSCLK_UART0_APB>; 395 resets = <&syscrg JH7110_SYSRST_UART0_APB>, 396 <&syscrg JH7110_SYSRST_UART0_CORE>; 406 clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>, 407 <&syscrg JH7110_SYSCLK_UART1_APB> 878 syscrg: clock-controller@13020000 { label [all...]
jh7110.dtsi	65 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 98 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 131 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 164 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 392 clocks = <&syscrg JH7110_SYSCLK_UART0_CORE>, 393 <&syscrg JH7110_SYSCLK_UART0_APB>; 395 resets = <&syscrg JH7110_SYSRST_UART0_APB>, 396 <&syscrg JH7110_SYSRST_UART0_CORE>; 406 clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>, 407 <&syscrg JH7110_SYSCLK_UART1_APB> 878 syscrg: clock-controller@13020000 { label [all...]
jh7110.dtsi	65 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 98 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 131 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 164 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; 392 clocks = <&syscrg JH7110_SYSCLK_UART0_CORE>, 393 <&syscrg JH7110_SYSCLK_UART0_APB>; 395 resets = <&syscrg JH7110_SYSRST_UART0_APB>, 396 <&syscrg JH7110_SYSRST_UART0_CORE>; 406 clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>, 407 <&syscrg JH7110_SYSCLK_UART1_APB> 878 syscrg: clock-controller@13020000 { label [all...]

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