/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
amdgpu_dcn20_dsc.c | 544 uint32_t temp_int; local in function:dsc_write_to_registers 587 temp_int = reg_vals->bpp_x32; 589 temp_int = reg_vals->bpp_x32 >> 1; 592 BITS_PER_PIXEL, temp_int, 735 temp_int = reg_vals->pps.initial_dec_delay; 737 DSCC_TEST_DEBUG_BUS0_ROTATE, temp_int & 0x1f, 738 DSCC_TEST_DEBUG_BUS1_ROTATE, temp_int >> 5 & 0x1f, 739 DSCC_TEST_DEBUG_BUS2_ROTATE, temp_int >> 10 & 0x1f, 740 DSCC_TEST_DEBUG_BUS3_ROTATE, temp_int >> 15 & 0x1);
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amdgpu_dcn20_dsc.c | 544 uint32_t temp_int; local in function:dsc_write_to_registers 587 temp_int = reg_vals->bpp_x32; 589 temp_int = reg_vals->bpp_x32 >> 1; 592 BITS_PER_PIXEL, temp_int, 735 temp_int = reg_vals->pps.initial_dec_delay; 737 DSCC_TEST_DEBUG_BUS0_ROTATE, temp_int & 0x1f, 738 DSCC_TEST_DEBUG_BUS1_ROTATE, temp_int >> 5 & 0x1f, 739 DSCC_TEST_DEBUG_BUS2_ROTATE, temp_int >> 10 & 0x1f, 740 DSCC_TEST_DEBUG_BUS3_ROTATE, temp_int >> 15 & 0x1);
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amdgpu_dcn20_dsc.c | 544 uint32_t temp_int; local in function:dsc_write_to_registers 587 temp_int = reg_vals->bpp_x32; 589 temp_int = reg_vals->bpp_x32 >> 1; 592 BITS_PER_PIXEL, temp_int, 735 temp_int = reg_vals->pps.initial_dec_delay; 737 DSCC_TEST_DEBUG_BUS0_ROTATE, temp_int & 0x1f, 738 DSCC_TEST_DEBUG_BUS1_ROTATE, temp_int >> 5 & 0x1f, 739 DSCC_TEST_DEBUG_BUS2_ROTATE, temp_int >> 10 & 0x1f, 740 DSCC_TEST_DEBUG_BUS3_ROTATE, temp_int >> 15 & 0x1);
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