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  /src/sys/arch/emips/emips/
xilinx_ml40x.c 114 * Map the USART 1:1, we just turned on the TLB.
115 * NB: This must be a wired TLB entry lest we lose it before autoconf().
121 struct tlbmask tlb; local
123 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
124 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
125 tlb_write_entry(3, &tlb);
xs_bee3.c 111 * Map the USART 1:1, we just turned on the TLB.
112 * NB: This must be a wired TLB entry lest we lose it before autoconf().
118 struct tlbmask tlb; local
120 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
121 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
122 tlb_write_entry(3, &tlb);
xilinx_ml40x.c 114 * Map the USART 1:1, we just turned on the TLB.
115 * NB: This must be a wired TLB entry lest we lose it before autoconf().
121 struct tlbmask tlb; local
123 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
124 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
125 tlb_write_entry(3, &tlb);
xs_bee3.c 111 * Map the USART 1:1, we just turned on the TLB.
112 * NB: This must be a wired TLB entry lest we lose it before autoconf().
118 struct tlbmask tlb; local
120 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
121 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
122 tlb_write_entry(3, &tlb);
xilinx_ml40x.c 114 * Map the USART 1:1, we just turned on the TLB.
115 * NB: This must be a wired TLB entry lest we lose it before autoconf().
121 struct tlbmask tlb; local
123 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
124 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
125 tlb_write_entry(3, &tlb);
xs_bee3.c 111 * Map the USART 1:1, we just turned on the TLB.
112 * NB: This must be a wired TLB entry lest we lose it before autoconf().
118 struct tlbmask tlb; local
120 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
121 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
122 tlb_write_entry(3, &tlb);
xilinx_ml40x.c 114 * Map the USART 1:1, we just turned on the TLB.
115 * NB: This must be a wired TLB entry lest we lose it before autoconf().
121 struct tlbmask tlb; local
123 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
124 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
125 tlb_write_entry(3, &tlb);
xs_bee3.c 111 * Map the USART 1:1, we just turned on the TLB.
112 * NB: This must be a wired TLB entry lest we lose it before autoconf().
118 struct tlbmask tlb; local
120 tlb.tlb_hi = USART_DEFAULT_ADDRESS;
121 tlb.tlb_lo0 = USART_DEFAULT_ADDRESS | 0xf02;
122 tlb_write_entry(3, &tlb);
interrupt.c 80 struct tlbmask tlb; local
85 tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS;
86 tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
87 tlb_write_entry(4, &tlb);
89 tlb.tlb_hi = TIMER_DEFAULT_ADDRESS;
90 tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02;
91 tlb_write_entry(5, &tlb);
interrupt.c 80 struct tlbmask tlb; local
85 tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS;
86 tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
87 tlb_write_entry(4, &tlb);
89 tlb.tlb_hi = TIMER_DEFAULT_ADDRESS;
90 tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02;
91 tlb_write_entry(5, &tlb);
interrupt.c 80 struct tlbmask tlb; local
85 tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS;
86 tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
87 tlb_write_entry(4, &tlb);
89 tlb.tlb_hi = TIMER_DEFAULT_ADDRESS;
90 tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02;
91 tlb_write_entry(5, &tlb);
interrupt.c 80 struct tlbmask tlb; local
85 tlb.tlb_hi = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS;
86 tlb.tlb_lo0 = INTERRUPT_CONTROLLER_DEFAULT_ADDRESS | 0xf02;
87 tlb_write_entry(4, &tlb);
89 tlb.tlb_hi = TIMER_DEFAULT_ADDRESS;
90 tlb.tlb_lo0 = TIMER_DEFAULT_ADDRESS | 0xf02;
91 tlb_write_entry(5, &tlb);
  /src/sys/arch/mips/mips/
wired_map.c 93 struct tlbmask tlb; local
101 /* TLB entries come in pairs: this is the first address of the pair */
148 tlb.tlb_mask = mips3_wired_map[index].pgmask;
149 tlb.tlb_hi = mips3_vad_to_vpn(va0);
151 tlb.tlb_lo0 = MIPS3_PG_G;
153 tlb.tlb_lo0 =
158 tlb.tlb_lo1 = MIPS3_PG_G;
160 tlb.tlb_lo1 = mips3_paddr_to_tlbpfn(
164 tlb_write_entry(MIPS3_TLB_WIRED_UPAGES + index, &tlb);
wired_map.c 93 struct tlbmask tlb; local
101 /* TLB entries come in pairs: this is the first address of the pair */
148 tlb.tlb_mask = mips3_wired_map[index].pgmask;
149 tlb.tlb_hi = mips3_vad_to_vpn(va0);
151 tlb.tlb_lo0 = MIPS3_PG_G;
153 tlb.tlb_lo0 =
158 tlb.tlb_lo1 = MIPS3_PG_G;
160 tlb.tlb_lo1 = mips3_paddr_to_tlbpfn(
164 tlb_write_entry(MIPS3_TLB_WIRED_UPAGES + index, &tlb);
wired_map.c 93 struct tlbmask tlb; local
101 /* TLB entries come in pairs: this is the first address of the pair */
148 tlb.tlb_mask = mips3_wired_map[index].pgmask;
149 tlb.tlb_hi = mips3_vad_to_vpn(va0);
151 tlb.tlb_lo0 = MIPS3_PG_G;
153 tlb.tlb_lo0 =
158 tlb.tlb_lo1 = MIPS3_PG_G;
160 tlb.tlb_lo1 = mips3_paddr_to_tlbpfn(
164 tlb_write_entry(MIPS3_TLB_WIRED_UPAGES + index, &tlb);
wired_map.c 93 struct tlbmask tlb; local
101 /* TLB entries come in pairs: this is the first address of the pair */
148 tlb.tlb_mask = mips3_wired_map[index].pgmask;
149 tlb.tlb_hi = mips3_vad_to_vpn(va0);
151 tlb.tlb_lo0 = MIPS3_PG_G;
153 tlb.tlb_lo0 =
158 tlb.tlb_lo1 = MIPS3_PG_G;
160 tlb.tlb_lo1 = mips3_paddr_to_tlbpfn(
164 tlb_write_entry(MIPS3_TLB_WIRED_UPAGES + index, &tlb);
  /src/sys/arch/ews4800mips/stand/common/
cop0.c 39 struct tlb { struct
48 static void __tlb_pagemask(struct tlb *);
52 EWS4800/350. IPL don't handle TLB refill exception.
72 struct tlb *e;
81 case 'r': /* Read TLB entry all. */
86 case 'd': /* Dump TLB summary */
97 case 'p': /* Print TLB entry */
99 printf("tlb p entry#.\n");
143 __tlb_pagemask(struct tlb *e)
cop0.c 39 struct tlb { struct
48 static void __tlb_pagemask(struct tlb *);
52 EWS4800/350. IPL don't handle TLB refill exception.
72 struct tlb *e;
81 case 'r': /* Read TLB entry all. */
86 case 'd': /* Dump TLB summary */
97 case 'p': /* Print TLB entry */
99 printf("tlb p entry#.\n");
143 __tlb_pagemask(struct tlb *e)
cop0.c 39 struct tlb { struct
48 static void __tlb_pagemask(struct tlb *);
52 EWS4800/350. IPL don't handle TLB refill exception.
72 struct tlb *e;
81 case 'r': /* Read TLB entry all. */
86 case 'd': /* Dump TLB summary */
97 case 'p': /* Print TLB entry */
99 printf("tlb p entry#.\n");
143 __tlb_pagemask(struct tlb *e)
cop0.c 39 struct tlb { struct
48 static void __tlb_pagemask(struct tlb *);
52 EWS4800/350. IPL don't handle TLB refill exception.
72 struct tlb *e;
81 case 'r': /* Read TLB entry all. */
86 case 'd': /* Dump TLB summary */
97 case 'p': /* Print TLB entry */
99 printf("tlb p entry#.\n");
143 __tlb_pagemask(struct tlb *e)
  /src/sys/arch/sparc64/include/
bootinfo.h 121 struct tlb_entry tlb[1]; member in struct:btinfo_tlb
bootinfo.h 121 struct tlb_entry tlb[1]; member in struct:btinfo_tlb
bootinfo.h 121 struct tlb_entry tlb[1]; member in struct:btinfo_tlb
bootinfo.h 121 struct tlb_entry tlb[1]; member in struct:btinfo_tlb
  /src/sys/arch/arc/arc/
minidebug.c 551 printf("tlb-dump\n");
562 printf("tlb");
944 * Dump TLB contents.
950 struct tlb tlb; local
955 mips3_TLBRead(tlbno, &tlb);
956 if (tlb.tlb_lo0 & MIPS3_PG_V || tlb.tlb_lo1 & MIPS3_PG_V) {
957 printf("TLB %2d vad 0x%08x ", tlbno, tlb.tlb_hi)
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