/src/games/larn/ |
movem.c | 33 static int tmp1, tmp2, tmp3, tmp4, distance; variable in typeref:typename:int 51 tmp3 = playerx - 10; 57 tmp3 = playerx - 5; 68 if (tmp3 < 0) 69 tmp3 = 0; 78 if (tmp3 < 1) 79 tmp3 = 1; 85 for (i = tmp3; i < tmp4; i++) 93 for (i = tmp3; i < tmp4; i++) 103 for (i = tmp3; i < tmp4; i++ [all...] |
movem.c | 33 static int tmp1, tmp2, tmp3, tmp4, distance; variable in typeref:typename:int 51 tmp3 = playerx - 10; 57 tmp3 = playerx - 5; 68 if (tmp3 < 0) 69 tmp3 = 0; 78 if (tmp3 < 1) 79 tmp3 = 1; 85 for (i = tmp3; i < tmp4; i++) 93 for (i = tmp3; i < tmp4; i++) 103 for (i = tmp3; i < tmp4; i++ [all...] |
movem.c | 33 static int tmp1, tmp2, tmp3, tmp4, distance; variable in typeref:typename:int 51 tmp3 = playerx - 10; 57 tmp3 = playerx - 5; 68 if (tmp3 < 0) 69 tmp3 = 0; 78 if (tmp3 < 1) 79 tmp3 = 1; 85 for (i = tmp3; i < tmp4; i++) 93 for (i = tmp3; i < tmp4; i++) 103 for (i = tmp3; i < tmp4; i++ [all...] |
/src/sys/arch/mips/cavium/dev/ |
octeon_cop2var.h | 60 uint64_t tmp0, tmp1, tmp2, tmp3; \ 82 CNASM_##AU##LD(tmp3, 24, key) \ 83 CNASM_MT2(tmp3, CVM_MT_AES_KEY, 3) \ 90 [tmp3] "=&r" (tmp3) \ 240 uint64_t tmp0, tmp1, tmp2, tmp3; \ 249 CNASM_##AU##LD(tmp3, 24, s) \ 253 CNASM_MT2(tmp3, CVM_MT_AES_##ED##1, 0) \ 257 CNASM_MF2(tmp3, CVM_MF_AES_RESINP, 1) \ 259 CNASM_##AU##SD(tmp3, 24, d) 582 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_md5_update_unaligned_vaddr64 681 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha1_update_unaligned_vaddr64 723 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_set_iv_unaligned_vaddr64 753 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_get_iv_unaligned_vaddr64 783 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_update_unaligned_vaddr64 825 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_set_iv_unaligned_vaddr64 863 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_get_iv_unaligned_vaddr64 901 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_update_unaligned_vaddr64 [all...] |
octeon_cop2var.h | 60 uint64_t tmp0, tmp1, tmp2, tmp3; \ 82 CNASM_##AU##LD(tmp3, 24, key) \ 83 CNASM_MT2(tmp3, CVM_MT_AES_KEY, 3) \ 90 [tmp3] "=&r" (tmp3) \ 240 uint64_t tmp0, tmp1, tmp2, tmp3; \ 249 CNASM_##AU##LD(tmp3, 24, s) \ 253 CNASM_MT2(tmp3, CVM_MT_AES_##ED##1, 0) \ 257 CNASM_MF2(tmp3, CVM_MF_AES_RESINP, 1) \ 259 CNASM_##AU##SD(tmp3, 24, d) 582 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_md5_update_unaligned_vaddr64 681 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha1_update_unaligned_vaddr64 723 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_set_iv_unaligned_vaddr64 753 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_get_iv_unaligned_vaddr64 783 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_update_unaligned_vaddr64 825 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_set_iv_unaligned_vaddr64 863 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_get_iv_unaligned_vaddr64 901 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_update_unaligned_vaddr64 [all...] |
octeon_cop2var.h | 60 uint64_t tmp0, tmp1, tmp2, tmp3; \ 82 CNASM_##AU##LD(tmp3, 24, key) \ 83 CNASM_MT2(tmp3, CVM_MT_AES_KEY, 3) \ 90 [tmp3] "=&r" (tmp3) \ 240 uint64_t tmp0, tmp1, tmp2, tmp3; \ 249 CNASM_##AU##LD(tmp3, 24, s) \ 253 CNASM_MT2(tmp3, CVM_MT_AES_##ED##1, 0) \ 257 CNASM_MF2(tmp3, CVM_MF_AES_RESINP, 1) \ 259 CNASM_##AU##SD(tmp3, 24, d) 582 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_md5_update_unaligned_vaddr64 681 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha1_update_unaligned_vaddr64 723 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_set_iv_unaligned_vaddr64 753 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_get_iv_unaligned_vaddr64 783 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha256_update_unaligned_vaddr64 825 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_set_iv_unaligned_vaddr64 863 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_get_iv_unaligned_vaddr64 901 uint64_t tmp0, tmp1, tmp2, tmp3; local in function:octeon_cop2_sha512_update_unaligned_vaddr64 [all...] |
/src/sys/dev/ic/ |
z8530tty.c | 973 uint8_t tmp3, tmp4, tmp5; local in function:zsparam 1035 tmp3 = cs->cs_preg[3]; 1037 CLR(tmp3, ZSWR3_RXSIZE); 1041 SET(tmp3, ZSWR3_RX_5); 1045 SET(tmp3, ZSWR3_RX_6); 1049 SET(tmp3, ZSWR3_RX_7); 1053 SET(tmp3, ZSWR3_RX_8); 1057 cs->cs_preg[3] = tmp3;
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z8530tty.c | 973 uint8_t tmp3, tmp4, tmp5; local in function:zsparam 1035 tmp3 = cs->cs_preg[3]; 1037 CLR(tmp3, ZSWR3_RXSIZE); 1041 SET(tmp3, ZSWR3_RX_5); 1045 SET(tmp3, ZSWR3_RX_6); 1049 SET(tmp3, ZSWR3_RX_7); 1053 SET(tmp3, ZSWR3_RX_8); 1057 cs->cs_preg[3] = tmp3;
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z8530tty.c | 973 uint8_t tmp3, tmp4, tmp5; local in function:zsparam 1035 tmp3 = cs->cs_preg[3]; 1037 CLR(tmp3, ZSWR3_RXSIZE); 1041 SET(tmp3, ZSWR3_RX_5); 1045 SET(tmp3, ZSWR3_RX_6); 1049 SET(tmp3, ZSWR3_RX_7); 1053 SET(tmp3, ZSWR3_RX_8); 1057 cs->cs_preg[3] = tmp3;
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_aead/aes256gcm/aesni/ |
aead_aes256gcm_aesni.c | 205 __m128i tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9; variable in typeref:typename:__m128i 226 tmp3 = _mm_clmulepi64_si128(A, B, 0x00); 233 tmp15 = _mm_xor_si128(tmp3, tmp13); 268 __m128i tmp3 = _mm_clmulepi64_si128(A, B, 0x00); local in function:mulv 275 __m128i tmp15 = _mm_xor_si128(tmp3, tmp13); 373 tmp0 = _mm_xor_si128(tmp3, tmp0);\ 380 tmp3 = lo; \ 382 tmp3B = _mm_srli_epi32(tmp3, 31); \ 384 tmp3 = _mm_slli_epi32(tmp3, 1); [all...] |
aead_aes256gcm_aesni.c | 205 __m128i tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9; variable in typeref:typename:__m128i 226 tmp3 = _mm_clmulepi64_si128(A, B, 0x00); 233 tmp15 = _mm_xor_si128(tmp3, tmp13); 268 __m128i tmp3 = _mm_clmulepi64_si128(A, B, 0x00); local in function:mulv 275 __m128i tmp15 = _mm_xor_si128(tmp3, tmp13); 373 tmp0 = _mm_xor_si128(tmp3, tmp0);\ 380 tmp3 = lo; \ 382 tmp3B = _mm_srli_epi32(tmp3, 31); \ 384 tmp3 = _mm_slli_epi32(tmp3, 1); [all...] |
aead_aes256gcm_aesni.c | 205 __m128i tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9; variable in typeref:typename:__m128i 226 tmp3 = _mm_clmulepi64_si128(A, B, 0x00); 233 tmp15 = _mm_xor_si128(tmp3, tmp13); 268 __m128i tmp3 = _mm_clmulepi64_si128(A, B, 0x00); local in function:mulv 275 __m128i tmp15 = _mm_xor_si128(tmp3, tmp13); 373 tmp0 = _mm_xor_si128(tmp3, tmp0);\ 380 tmp3 = lo; \ 382 tmp3B = _mm_srli_epi32(tmp3, 31); \ 384 tmp3 = _mm_slli_epi32(tmp3, 1); [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
amdgpu_smu7_hwmgr.c | 1604 uint16_t tmp3 = 0; local in function:smu7_init_dpm_defaults 1606 &tmp3); 1607 tmp3 = (tmp3 >> 5) & 0x3; 1608 data->vddc_phase_shed_control = ((tmp3 << 1) | (tmp3 >> 1)) & 0x3;
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amdgpu_smu7_hwmgr.c | 1604 uint16_t tmp3 = 0; local in function:smu7_init_dpm_defaults 1606 &tmp3); 1607 tmp3 = (tmp3 >> 5) & 0x3; 1608 data->vddc_phase_shed_control = ((tmp3 << 1) | (tmp3 >> 1)) & 0x3;
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amdgpu_smu7_hwmgr.c | 1604 uint16_t tmp3 = 0; local in function:smu7_init_dpm_defaults 1606 &tmp3); 1607 tmp3 = (tmp3 >> 5) & 0x3; 1608 data->vddc_phase_shed_control = ((tmp3 << 1) | (tmp3 >> 1)) & 0x3;
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