| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_mpc.c | 141 unsigned int top_sel; local in function:mpc1_is_mpcc_idle
145 REG_GET(MPCC_TOP_SEL[mpcc_id], MPCC_TOP_SEL, &top_sel);
148 if (top_sel == 0xf && opp_id == 0xf && idle)
157 unsigned int top_sel, mpc_busy, mpc_idle; local in function:mpc1_assert_mpcc_idle_before_connect
160 MPCC_TOP_SEL, &top_sel);
162 if (top_sel == 0xf) {
403 unsigned int top_sel; local in function:mpc1_init_mpcc_list_from_hw
415 REG_GET(MPCC_TOP_SEL[mpcc_id], MPCC_TOP_SEL, &top_sel);
421 if ((opp_id == tree->opp_id) && (top_sel != 0xf)) {
423 mpcc->dpp_id = top_sel;
[all...] |
| amdgpu_dcn10_mpc.c | 141 unsigned int top_sel; local in function:mpc1_is_mpcc_idle
145 REG_GET(MPCC_TOP_SEL[mpcc_id], MPCC_TOP_SEL, &top_sel);
148 if (top_sel == 0xf && opp_id == 0xf && idle)
157 unsigned int top_sel, mpc_busy, mpc_idle; local in function:mpc1_assert_mpcc_idle_before_connect
160 MPCC_TOP_SEL, &top_sel);
162 if (top_sel == 0xf) {
403 unsigned int top_sel; local in function:mpc1_init_mpcc_list_from_hw
415 REG_GET(MPCC_TOP_SEL[mpcc_id], MPCC_TOP_SEL, &top_sel);
421 if ((opp_id == tree->opp_id) && (top_sel != 0xf)) {
423 mpcc->dpp_id = top_sel;
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_mpc.c | 493 unsigned int top_sel, mpc_busy, mpc_idle, mpc_disabled; local in function:mpc2_assert_mpcc_idle_before_connect
496 MPCC_TOP_SEL, &top_sel);
503 if (top_sel == 0xf) {
|
| amdgpu_dcn20_mpc.c | 493 unsigned int top_sel, mpc_busy, mpc_idle, mpc_disabled; local in function:mpc2_assert_mpcc_idle_before_connect
496 MPCC_TOP_SEL, &top_sel);
503 if (top_sel == 0xf) {
|
