/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_umc_v6_1.c | 94 uint32_t umc_reg_offset, 121 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4); 124 WREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4, ecc_err_cnt_sel); 125 ecc_err_cnt = RREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4); 130 WREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4, UMC_V6_1_CE_CNT_INIT); 135 WREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4, ecc_err_cnt_sel); 136 ecc_err_cnt = RREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4); 141 WREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4, UMC_V6_1_CE_CNT_INIT); 145 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); 153 uint32_t umc_reg_offset, 187 uint32_t umc_reg_offset = 0; local in function:umc_v6_1_query_ras_error_count 289 uint32_t umc_reg_offset = 0; local in function:umc_v6_1_query_ras_error_address 354 uint32_t umc_reg_offset = 0; local in function:umc_v6_1_err_cnt_init [all...] |
amdgpu_umc_v6_1.c | 94 uint32_t umc_reg_offset, 121 ecc_err_cnt_sel = RREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4); 124 WREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4, ecc_err_cnt_sel); 125 ecc_err_cnt = RREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4); 130 WREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4, UMC_V6_1_CE_CNT_INIT); 135 WREG32_PCIE((ecc_err_cnt_sel_addr + umc_reg_offset) * 4, ecc_err_cnt_sel); 136 ecc_err_cnt = RREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4); 141 WREG32_PCIE((ecc_err_cnt_addr + umc_reg_offset) * 4, UMC_V6_1_CE_CNT_INIT); 145 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); 153 uint32_t umc_reg_offset, 187 uint32_t umc_reg_offset = 0; local in function:umc_v6_1_query_ras_error_count 289 uint32_t umc_reg_offset = 0; local in function:umc_v6_1_query_ras_error_address 354 uint32_t umc_reg_offset = 0; local in function:umc_v6_1_err_cnt_init [all...] |