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  /src/sys/dev/ic/
igsfb_subr.c 487 int vblank_start, vblank_end, hblank_start, hblank_end; local in function:igsfb_set_mode
556 vblank_end = mode->vsync_end;
594 igs_crtc_write(iot, ioh, 0x16, (vblank_end - 1) & 0xff);
igsfb_subr.c 487 int vblank_start, vblank_end, hblank_start, hblank_end; local in function:igsfb_set_mode
556 vblank_end = mode->vsync_end;
594 igs_crtc_write(iot, ioh, 0x16, (vblank_end - 1) & 0xff);
igsfb_subr.c 487 int vblank_start, vblank_end, hblank_start, hblank_end; local in function:igsfb_set_mode
556 vblank_end = mode->vsync_end;
594 igs_crtc_write(iot, ioh, 0x16, (vblank_end - 1) & 0xff);
igsfb_subr.c 487 int vblank_start, vblank_end, hblank_start, hblank_end; local in function:igsfb_set_mode
556 vblank_end = mode->vsync_end;
594 igs_crtc_write(iot, ioh, 0x16, (vblank_end - 1) & 0xff);
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_crt.c 661 u32 vblank, vblank_start, vblank_end; local in function:intel_crt_load_detect
685 vblank_end = ((vblank >> 16) & 0xfff) + 1;
713 if (vblank_start <= vactive && vblank_end >= vtotal) {
721 ((vblank_end - 1) << 16));
725 if (vblank_start - vactive >= vtotal - vblank_end)
728 vsample = (vtotal + vblank_end) >> 1;
intel_crt.c 661 u32 vblank, vblank_start, vblank_end; local in function:intel_crt_load_detect
685 vblank_end = ((vblank >> 16) & 0xfff) + 1;
713 if (vblank_start <= vactive && vblank_end >= vtotal) {
721 ((vblank_end - 1) << 16));
725 if (vblank_start - vactive >= vtotal - vblank_end)
728 vsample = (vtotal + vblank_end) >> 1;
intel_crt.c 661 u32 vblank, vblank_start, vblank_end; local in function:intel_crt_load_detect
685 vblank_end = ((vblank >> 16) & 0xfff) + 1;
713 if (vblank_start <= vactive && vblank_end >= vtotal) {
721 ((vblank_end - 1) << 16));
725 if (vblank_start - vactive >= vtotal - vblank_end)
728 vsample = (vtotal + vblank_end) >> 1;
intel_crt.c 661 u32 vblank, vblank_start, vblank_end; local in function:intel_crt_load_detect
685 vblank_end = ((vblank >> 16) & 0xfff) + 1;
713 if (vblank_start <= vactive && vblank_end >= vtotal) {
721 ((vblank_end - 1) << 16));
725 if (vblank_start - vactive >= vtotal - vblank_end)
728 vsample = (vtotal + vblank_end) >> 1;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
amdgpu_dml1_display_rq_dlg_calc.c 1000 unsigned int vblank_end = e2e_pipe_param.pipe.dest.vblank_end; local in function:dml1_rq_dlg_get_dlg_params
1147 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */
1246 "WARNING_DLG: %s: vblank_start=%d vblank_end=%d",
1249 vblank_end);
amdgpu_dml1_display_rq_dlg_calc.c 1000 unsigned int vblank_end = e2e_pipe_param.pipe.dest.vblank_end; local in function:dml1_rq_dlg_get_dlg_params
1147 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */
1246 "WARNING_DLG: %s: vblank_start=%d vblank_end=%d",
1249 vblank_end);
amdgpu_dml1_display_rq_dlg_calc.c 1000 unsigned int vblank_end = e2e_pipe_param.pipe.dest.vblank_end; local in function:dml1_rq_dlg_get_dlg_params
1147 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */
1246 "WARNING_DLG: %s: vblank_start=%d vblank_end=%d",
1249 vblank_end);
amdgpu_dml1_display_rq_dlg_calc.c 1000 unsigned int vblank_end = e2e_pipe_param.pipe.dest.vblank_end; local in function:dml1_rq_dlg_get_dlg_params
1147 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */
1246 "WARNING_DLG: %s: vblank_start=%d vblank_end=%d",
1249 vblank_end);
display_mode_structs.h 320 unsigned int vblank_end; member in struct:_vcs_dpi_display_pipe_dest_params_st
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
amdgpu_display_rq_dlg_calc_20.c 797 unsigned int vblank_end = dst->vblank_end; local in function:dml20_rq_dlg_get_dlg_params
925 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1032 <= vblank_end / 2.0)
1039 <= vblank_end)
1051 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1054 vblank_end);
amdgpu_display_rq_dlg_calc_20v2.c 797 unsigned int vblank_end = dst->vblank_end; local in function:dml20v2_rq_dlg_get_dlg_params
925 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1033 <= vblank_end / 2.0)
1040 <= vblank_end)
1052 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1055 vblank_end);
amdgpu_display_rq_dlg_calc_20.c 797 unsigned int vblank_end = dst->vblank_end; local in function:dml20_rq_dlg_get_dlg_params
925 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1032 <= vblank_end / 2.0)
1039 <= vblank_end)
1051 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1054 vblank_end);
amdgpu_display_rq_dlg_calc_20v2.c 797 unsigned int vblank_end = dst->vblank_end; local in function:dml20v2_rq_dlg_get_dlg_params
925 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1033 <= vblank_end / 2.0)
1040 <= vblank_end)
1052 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1055 vblank_end);
amdgpu_display_rq_dlg_calc_20.c 797 unsigned int vblank_end = dst->vblank_end; local in function:dml20_rq_dlg_get_dlg_params
925 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1032 <= vblank_end / 2.0)
1039 <= vblank_end)
1051 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1054 vblank_end);
amdgpu_display_rq_dlg_calc_20v2.c 797 unsigned int vblank_end = dst->vblank_end; local in function:dml20v2_rq_dlg_get_dlg_params
925 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1033 <= vblank_end / 2.0)
1040 <= vblank_end)
1052 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1055 vblank_end);
amdgpu_display_rq_dlg_calc_20.c 797 unsigned int vblank_end = dst->vblank_end; local in function:dml20_rq_dlg_get_dlg_params
925 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1032 <= vblank_end / 2.0)
1039 <= vblank_end)
1051 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1054 vblank_end);
amdgpu_display_rq_dlg_calc_20v2.c 797 unsigned int vblank_end = dst->vblank_end; local in function:dml20v2_rq_dlg_get_dlg_params
925 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1033 <= vblank_end / 2.0)
1040 <= vblank_end)
1052 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1055 vblank_end);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
amdgpu_display_rq_dlg_calc_21.c 843 unsigned int vblank_end = dst->vblank_end; local in function:dml_rq_dlg_get_dlg_params
971 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1072 <= vblank_end / 2.0)
1079 <= vblank_end)
1092 "WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1095 vblank_end);
amdgpu_display_rq_dlg_calc_21.c 843 unsigned int vblank_end = dst->vblank_end; local in function:dml_rq_dlg_get_dlg_params
971 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1072 <= vblank_end / 2.0)
1079 <= vblank_end)
1092 "WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1095 vblank_end);
amdgpu_display_rq_dlg_calc_21.c 843 unsigned int vblank_end = dst->vblank_end; local in function:dml_rq_dlg_get_dlg_params
971 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1072 <= vblank_end / 2.0)
1079 <= vblank_end)
1092 "WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1095 vblank_end);
amdgpu_display_rq_dlg_calc_21.c 843 unsigned int vblank_end = dst->vblank_end; local in function:dml_rq_dlg_get_dlg_params
971 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
1072 <= vblank_end / 2.0)
1079 <= vblank_end)
1092 "WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
1095 vblank_end);

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