| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm_pp_smu.c | 483 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges)
555 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_rv_set_wm_ranges
556 struct dm_pp_clock_range_for_dmif_wm_set_soc15 *wm_dce_clocks = wm_with_clock_ranges.wm_dmif_clocks_ranges;
557 struct dm_pp_clock_range_for_mcif_wm_set_soc15 *wm_soc_clocks = wm_with_clock_ranges.wm_mcif_clocks_ranges;
560 wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
561 wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets;
563 for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
579 for (i = 0; i < wm_with_clock_ranges.num_wm_mcif_sets; i++) {
597 &wm_with_clock_ranges);
600 &wm_with_clock_ranges);
673 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_nv_set_wm_ranges
925 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_rn_set_wm_ranges
[all...] |
| amdgpu_dm_pp_smu.c | 483 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges)
555 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_rv_set_wm_ranges
556 struct dm_pp_clock_range_for_dmif_wm_set_soc15 *wm_dce_clocks = wm_with_clock_ranges.wm_dmif_clocks_ranges;
557 struct dm_pp_clock_range_for_mcif_wm_set_soc15 *wm_soc_clocks = wm_with_clock_ranges.wm_mcif_clocks_ranges;
560 wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
561 wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets;
563 for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
579 for (i = 0; i < wm_with_clock_ranges.num_wm_mcif_sets; i++) {
597 &wm_with_clock_ranges);
600 &wm_with_clock_ranges);
673 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_nv_set_wm_ranges
925 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_rn_set_wm_ranges
[all...] |
| amdgpu_dm_pp_smu.c | 483 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges)
555 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_rv_set_wm_ranges
556 struct dm_pp_clock_range_for_dmif_wm_set_soc15 *wm_dce_clocks = wm_with_clock_ranges.wm_dmif_clocks_ranges;
557 struct dm_pp_clock_range_for_mcif_wm_set_soc15 *wm_soc_clocks = wm_with_clock_ranges.wm_mcif_clocks_ranges;
560 wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
561 wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets;
563 for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
579 for (i = 0; i < wm_with_clock_ranges.num_wm_mcif_sets; i++) {
597 &wm_with_clock_ranges);
600 &wm_with_clock_ranges);
673 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_nv_set_wm_ranges
925 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; local in function:pp_rn_set_wm_ranges
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_smu10_hwmgr.c | 1164 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:smu10_set_watermarks_for_clocks_ranges
1167 smu_set_watermarks_for_clocks_ranges(table,wm_with_clock_ranges);
|
| amdgpu_vega12_hwmgr.c | 1872 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:vega12_set_watermarks_for_clocks_ranges
1877 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
|
| amdgpu_smu10_hwmgr.c | 1164 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:smu10_set_watermarks_for_clocks_ranges
1167 smu_set_watermarks_for_clocks_ranges(table,wm_with_clock_ranges);
|
| amdgpu_vega12_hwmgr.c | 1872 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:vega12_set_watermarks_for_clocks_ranges
1877 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
|
| amdgpu_smu10_hwmgr.c | 1164 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:smu10_set_watermarks_for_clocks_ranges
1167 smu_set_watermarks_for_clocks_ranges(table,wm_with_clock_ranges);
|
| amdgpu_vega12_hwmgr.c | 1872 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:vega12_set_watermarks_for_clocks_ranges
1877 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
|
| amdgpu_vega20_hwmgr.c | 2902 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:vega20_set_watermarks_for_clocks_ranges
2907 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
|
| amdgpu_vega20_hwmgr.c | 2902 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:vega20_set_watermarks_for_clocks_ranges
2907 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
|
| amdgpu_vega20_hwmgr.c | 2902 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; local in function:vega20_set_watermarks_for_clocks_ranges
2907 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
|
| amdgpu_vega10_hwmgr.c | 4423 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_range; local in function:vega10_set_watermarks_for_clocks_ranges
4427 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
|
| amdgpu_vega10_hwmgr.c | 4423 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_range; local in function:vega10_set_watermarks_for_clocks_ranges
4427 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
|
| amdgpu_vega10_hwmgr.c | 4423 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_range; local in function:vega10_set_watermarks_for_clocks_ranges
4427 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
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