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Searched defs:wptr_poll_cntl (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_sdma_v3_0.c	`654 u32 rb_cntl, ib_cntl, wptr_poll_cntl; local in function:sdma_v3_0_gfx_resume 728 wptr_poll_cntl = RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]); 732 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 736 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 740 WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i], wptr_poll_cntl);`
amdgpu_sdma_v4_0.c	1093 u32 rb_cntl, ib_cntl, wptr_poll_cntl; local in function:sdma_v4_0_gfx_resume 1150 wptr_poll_cntl = RREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL); 1151 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 1154 WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, wptr_poll_cntl); 1183 u32 rb_cntl, ib_cntl, wptr_poll_cntl; local in function:sdma_v4_0_page_resume 1241 wptr_poll_cntl = RREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL); 1242 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 1245 WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, wptr_poll_cntl); [all...]
amdgpu_sdma_v5_0.c	`625 u32 wptr_poll_cntl; local in function:sdma_v5_0_gfx_resume 658 wptr_poll_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, 660 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 664 wptr_poll_cntl);`
amdgpu_sdma_v3_0.c	`654 u32 rb_cntl, ib_cntl, wptr_poll_cntl; local in function:sdma_v3_0_gfx_resume 728 wptr_poll_cntl = RREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i]); 732 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 736 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 740 WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i], wptr_poll_cntl);`
amdgpu_sdma_v4_0.c	1093 u32 rb_cntl, ib_cntl, wptr_poll_cntl; local in function:sdma_v4_0_gfx_resume 1150 wptr_poll_cntl = RREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL); 1151 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 1154 WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, wptr_poll_cntl); 1183 u32 rb_cntl, ib_cntl, wptr_poll_cntl; local in function:sdma_v4_0_page_resume 1241 wptr_poll_cntl = RREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL); 1242 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 1245 WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, wptr_poll_cntl); [all...]
amdgpu_sdma_v5_0.c	`625 u32 wptr_poll_cntl; local in function:sdma_v5_0_gfx_resume 658 wptr_poll_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, 660 wptr_poll_cntl = REG_SET_FIELD(wptr_poll_cntl, 664 wptr_poll_cntl);`

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