/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
amdgpu_display_rq_dlg_calc_20.c | 902 double xfc_prefetch_margin; local in function:dml20_rq_dlg_get_dlg_params 1363 xfc_prefetch_margin = get_xfc_prefetch_margin(mode_lib, 1521 disp_dlg_regs->xfc_reg_prefetch_margin = dml_ceil(xfc_prefetch_margin * refclk_freq_in_mhz,
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amdgpu_display_rq_dlg_calc_20v2.c | 902 double xfc_prefetch_margin; local in function:dml20v2_rq_dlg_get_dlg_params 1364 xfc_prefetch_margin = get_xfc_prefetch_margin(mode_lib, 1522 disp_dlg_regs->xfc_reg_prefetch_margin = dml_ceil(xfc_prefetch_margin * refclk_freq_in_mhz,
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amdgpu_display_rq_dlg_calc_20.c | 902 double xfc_prefetch_margin; local in function:dml20_rq_dlg_get_dlg_params 1363 xfc_prefetch_margin = get_xfc_prefetch_margin(mode_lib, 1521 disp_dlg_regs->xfc_reg_prefetch_margin = dml_ceil(xfc_prefetch_margin * refclk_freq_in_mhz,
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amdgpu_display_rq_dlg_calc_20v2.c | 902 double xfc_prefetch_margin; local in function:dml20v2_rq_dlg_get_dlg_params 1364 xfc_prefetch_margin = get_xfc_prefetch_margin(mode_lib, 1522 disp_dlg_regs->xfc_reg_prefetch_margin = dml_ceil(xfc_prefetch_margin * refclk_freq_in_mhz,
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
amdgpu_display_rq_dlg_calc_21.c | 948 double xfc_prefetch_margin; local in function:dml_rq_dlg_get_dlg_params 1433 xfc_prefetch_margin = get_xfc_prefetch_margin( 1622 xfc_prefetch_margin * refclk_freq_in_mhz, 1);
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amdgpu_display_rq_dlg_calc_21.c | 948 double xfc_prefetch_margin; local in function:dml_rq_dlg_get_dlg_params 1433 xfc_prefetch_margin = get_xfc_prefetch_margin( 1622 xfc_prefetch_margin * refclk_freq_in_mhz, 1);
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