| /src/crypto/external/apache2/openssl/dist/crypto/aes/asm/ |
| aes-riscv64-zvkned.pl | 63 $V16, $V17, $V18, $V19, $V20, $V21, $V22, $V23,
948 @{[vmv_v_v $V21, $V19]}
949 @{[vaeskf2_vi $V21, $V20, 11]}
951 @{[vaeskf2_vi $V22, $V21, 12]}
952 @{[vmv_v_v $V23, $V21]}
979 @{[vse32_v $V21, $KEYP]}
1106 @{[vle32_v $V21, $KEYP]}
1107 @{[vaesem_vs $V1, $V21]}
1157 @{[vle32_v $V21, $KEYP]}
1158 @{[vaesem_vs $V1, $V21]}
[all...] |
| aes-riscv64-zvkb-zvkned.pl | 76 $V16, $V17, $V18, $V19, $V20, $V21, $V22, $V23,
|
| aes-riscv64-zvbb-zvkg-zvkned.pl | 78 $V16, $V17, $V18, $V19, $V20, $V21, $V22, $V23,
|
| /src/crypto/external/apache2/openssl/dist/crypto/sha/asm/ |
| sha256-riscv64-zvkb-zvknha_or_zvknhb.pl | 65 $V16, $V17, $V18, $V19, $V20, $V21, $V22, $V23,
99 @{[vle32_v $V21, $KT]}
252 @{[vadd_vv $V5, $V21, $V4]}
|
| sha512-riscv64-zvkb-zvknhb.pl | 65 $V16, $V17, $V18, $V19, $V20, $V21, $V22, $V23,
|
| /src/crypto/external/apache2/openssl/dist/crypto/chacha/asm/ |
| chacha-riscv64-v-zbb.pl | 93 $V11, $V12, $V13, $V14, $V15, $V16, $V17, $V18, $V19, $V20, $V21,
411 @{[vxor_vv $V21, $V21, $V5]}
|
| /src/crypto/external/apache2/openssl/dist/crypto/sm3/asm/ |
| sm3-riscv64-zvksh.pl | 69 $V16, $V17, $V18, $V19, $V20, $V21, $V22, $V23,
|
| /src/external/gpl3/gdb/dist/sim/aarch64/ |
| cpustate.h | 113 V21,
|
| /src/external/gpl3/gdb.old/dist/sim/aarch64/ |
| cpustate.h | 113 V21,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCTargetDesc.cpp | 108 SystemZ::V20, SystemZ::V21, SystemZ::V22, SystemZ::V23,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 82 V14, V15, V16, V17, V18, V19, V20, V21, V22, V23, V24, V25, V26, V27,
|
| /src/crypto/external/apache2/openssl/dist/crypto/modes/asm/ |
| aes-gcm-riscv64-zvkb-zvkg-zvkned.pl | 91 $V16, $V17, $V18, $V19, $V20, $V21, $V22, $V23,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/Disassembler/ |
| HexagonDisassembler.cpp | 581 Hexagon::V20, Hexagon::V21, Hexagon::V22, Hexagon::V23, Hexagon::V24,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/Disassembler/ |
| VEDisassembler.cpp | 101 VE::V16, VE::V17, VE::V18, VE::V19, VE::V20, VE::V21, VE::V22, VE::V23,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 171 {PPC::V21, -176}, \
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelLowering.cpp | 6625 RISCV::V20, RISCV::V21, RISCV::V22, RISCV::V23};
8184 .Case("{v21}", RISCV::V21)
|
