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    Searched refs:AVIVO_D1CRTC_CONTROL (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_rs600.c 102 if (!(RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[crtc]) & AVIVO_CRTC_EN))
332 tmp = RREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset);
334 WREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);
350 tmp = RREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset);
352 WREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);
radeon_rv515.c 315 crtc_enabled = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]) & AVIVO_CRTC_EN;
318 tmp = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]);
323 WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);
336 tmp = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]);
338 WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);
457 tmp = RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]);
459 WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);
r500_reg.h 350 #define AVIVO_D1CRTC_CONTROL 0x6080
radeon_device.c 720 reg = RREG32(AVIVO_D1CRTC_CONTROL) |
radeon_r600.c 1627 if (RREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i]) & AVIVO_CRTC_EN) {
  /src/sys/dev/pci/
radeonfb.c 2303 if (GET32(sc, AVIVO_D1CRTC_CONTROL) & AVIVO_CRTC_EN) {
2569 reg = GET32(sc, AVIVO_D1CRTC_CONTROL);
2603 CLR32(sc, AVIVO_D1CRTC_CONTROL, AVIVO_CRTC_EN);
2606 SET32(sc, AVIVO_D1CRTC_CONTROL, AVIVO_CRTC_EN);
radeonfbreg.h 3711 #define AVIVO_D1CRTC_CONTROL 0x6080

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