OpenGrok
Home
Sort by:
relevance
|
last modified time
|
path
Full Search
in project(s):
src
Definition
Symbol
File Path
History
|
|
Help
Searched
refs:CAR_PLLU_BASE_REG
(Results
1 - 4
of
4
) sorted by relevancy
/src/sys/arch/arm/nvidia/
tegra210_car.c
469
CLK_PLL("PLL_U", "CLK_M",
CAR_PLLU_BASE_REG
,
945
tegra_reg_set_clear(bst, bsh,
CAR_PLLU_BASE_REG
, CAR_PLLU_BASE_OVERRIDE, 0);
951
tegra_reg_set_clear(bst, bsh,
CAR_PLLU_BASE_REG
,
956
tegra_reg_set_clear(bst, bsh,
CAR_PLLU_BASE_REG
, CAR_PLLU_BASE_ENABLE, 0);
959
val = bus_space_read_4(bst, bsh,
CAR_PLLU_BASE_REG
);
961
tegra_reg_set_clear(bst, bsh,
CAR_PLLU_BASE_REG
, CAR_PLLU_BASE_CLKENABLE_ICUSB, 0);
962
tegra_reg_set_clear(bst, bsh,
CAR_PLLU_BASE_REG
, CAR_PLLU_BASE_CLKENABLE_HSIC, 0);
963
tegra_reg_set_clear(bst, bsh,
CAR_PLLU_BASE_REG
, CAR_PLLU_BASE_CLKENABLE_USB, 0);
971
tegra_reg_set_clear(bst, bsh,
CAR_PLLU_BASE_REG
, 0, CAR_PLLU_BASE_OVERRIDE);
984
tegra_reg_set_clear(bst, bsh,
CAR_PLLU_BASE_REG
, 0, CAR_PLLU_BASE_CLKENABLE_USB)
[
all
...]
tegra124_carreg.h
92
#define
CAR_PLLU_BASE_REG
0xc0
tegra210_carreg.h
98
#define
CAR_PLLU_BASE_REG
0xc0
tegra124_car.c
440
CLK_PLL("pll_u", "clk_m",
CAR_PLLU_BASE_REG
,
1039
if (tpll->base_reg ==
CAR_PLLU_BASE_REG
) {
Completed in 16 milliseconds
Indexes created Sat Oct 11 13:09:53 GMT 2025