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    Searched refs:CLK1_CLK3_DS_CNTL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
clk_mgr.h 115 uint32_t CLK1_CLK3_DS_CNTL; //dcf_deep_sleep_divider
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/
amdgpu_rn_clk_mgr.c 239 internal->CLK1_CLK3_DS_CNTL = REG_READ(CLK1_CLK3_DS_CNTL); //dcf deep sleep divider
264 regs_and_bypass->dcf_deep_sleep_divider = internal.CLK1_CLK3_DS_CNTL / 10;
330 chars_printed = snprintf_count(log_info->pBuf, remaining_buffer, "CLK1_CLK3_DS_CNTL,%d,dcf_deep_sleep_divider\n",
331 internal.CLK1_CLK3_DS_CNTL);

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