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    Searched refs:CLK_UART0_DIV (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
pistachio-clk.h	69 #define CLK_UART0_DIV 77
rk3568-cru.h	24 #define CLK_UART0_DIV 9
/src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/img/
pistachio.dtsi	260 <&clk_core CLK_UART0_DIV>;

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