| /src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/PDB/ |
| PDBSymbolCustom.h | 25 DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Custom)
|
| /src/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| XRayInstr.h | 41 constexpr XRayInstrMask Custom = 1U << XRIO_Custom;
43 constexpr XRayInstrMask All = FunctionEntry | FunctionExit | Custom | Typed;
|
| /src/external/apache2/llvm/dist/clang/lib/Basic/ |
| XRayInstr.cpp | 23 .Case("custom", XRayInstrKind::Custom)
46 if (Set.has(XRayInstrKind::Custom))
47 Values.push_back("custom");
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonISelLoweringHVX.cpp | 40 // produce such types. That, in turn, would imply using custom
75 setOperationAction(ISD::BITCAST, MVT::i16, Custom);
76 setOperationAction(ISD::BITCAST, MVT::i32, Custom);
77 setOperationAction(ISD::BITCAST, MVT::i64, Custom);
78 setOperationAction(ISD::BITCAST, MVT::v16i1, Custom);
79 setOperationAction(ISD::BITCAST, MVT::v128i1, Custom);
80 setOperationAction(ISD::BITCAST, MVT::i128, Custom);
83 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
112 setOperationAction(ISD::CTTZ, T, Custom);
113 setOperationAction(ISD::LOAD, T, Custom);
[all...] |
| HexagonISelLowering.cpp | 719 // Custom-handle ISD::READCYCLECOUNTER because the target-independent SDNode
1499 setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
1500 setOperationAction(ISD::JumpTable, MVT::i32, Custom);
1503 setOperationAction(ISD::INLINEASM, MVT::Other, Custom);
1504 setOperationAction(ISD::INLINEASM_BR, MVT::Other, Custom);
1505 setOperationAction(ISD::PREFETCH, MVT::Other, Custom);
1506 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom);
1507 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom);
1508 setOperationAction(ISD::EH_RETURN, MVT::Other, Custom);
1509 setOperationAction(ISD::GLOBAL_OFFSET_TABLE, MVT::i32, Custom);
[all...] |
| /src/sys/arch/amiga/amiga/ |
| custom.h | 1 /* $NetBSD: custom.h,v 1.12 2002/04/25 09:20:27 aymeric Exp $ */
30 * This is a rewrite (retype) of the Amiga's custom chip register map, based
32 * hardware/custom.h.
39 struct Custom {
201 /* Custom chips as seen by the kernel */
207 #define custom (*((volatile struct Custom *)CUSTOMbase)) macro
211 #define CUSTOM_OFS(field) ((long)&((struct Custom*)0)->field)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 70 setOperationAction(ISD::BR_CC, MVT::i64, Custom);
75 setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
77 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Custom);
81 // Set unsupported atomic operations as Custom so
89 setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom);
92 setOperationAction(ISD::ATOMIC_LOAD_AND, VT, Custom);
93 setOperationAction(ISD::ATOMIC_LOAD_OR, VT, Custom);
94 setOperationAction(ISD::ATOMIC_LOAD_XOR, VT, Custom);
95 setOperationAction(ISD::ATOMIC_SWAP, VT, Custom);
96 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelLowering.cpp | 174 setOperationAction(ISD::BRCOND, MVT::Other, Custom);
180 setOperationAction(ISD::VASTART, MVT::Other, Custom);
192 setOperationAction(ISD::ADD, MVT::i32, Custom);
193 setOperationAction(ISD::SUB, MVT::i32, Custom);
194 setOperationAction(ISD::SHL, MVT::i32, Custom);
195 setOperationAction(ISD::SRA, MVT::i32, Custom);
196 setOperationAction(ISD::SRL, MVT::i32, Custom);
198 setOperationAction(ISD::UADDO, MVT::i32, Custom);
199 setOperationAction(ISD::USUBO, MVT::i32, Custom);
200 setOperationAction(ISD::UADDSAT, MVT::i32, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | 10 /// Custom DAG lowering for R600
44 setOperationAction(ISD::LOAD, MVT::i32, Custom);
45 setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
46 setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
49 // spaces, so it is custom lowered to handle those where it isn't.
52 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Custom);
53 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Custom);
56 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i8, Custom);
57 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i16, Custom);
60 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Custom);
[all...] |
| SIISelLowering.cpp | 10 /// Custom DAG lowering for SI
142 // We need to custom lower vector stores from local memory
143 setOperationAction(ISD::LOAD, MVT::v2i32, Custom);
144 setOperationAction(ISD::LOAD, MVT::v3i32, Custom);
145 setOperationAction(ISD::LOAD, MVT::v4i32, Custom);
146 setOperationAction(ISD::LOAD, MVT::v5i32, Custom);
147 setOperationAction(ISD::LOAD, MVT::v8i32, Custom);
148 setOperationAction(ISD::LOAD, MVT::v16i32, Custom);
149 setOperationAction(ISD::LOAD, MVT::i1, Custom);
150 setOperationAction(ISD::LOAD, MVT::v32i32, Custom);
[all...] |
| AMDGPUISelLowering.cpp | 288 // This is totally unsupported, just custom lower to produce an error.
289 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
304 setOperationAction(ISD::FROUND, MVT::f32, Custom);
305 setOperationAction(ISD::FROUND, MVT::f64, Custom);
307 setOperationAction(ISD::FLOG, MVT::f32, Custom);
308 setOperationAction(ISD::FLOG10, MVT::f32, Custom);
309 setOperationAction(ISD::FEXP, MVT::f32, Custom);
312 setOperationAction(ISD::FNEARBYINT, MVT::f32, Custom);
313 setOperationAction(ISD::FNEARBYINT, MVT::f64, Custom);
315 setOperationAction(ISD::FREM, MVT::f16, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 366 setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
367 setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
368 setOperationAction(ISD::SETCC, MVT::i32, Custom);
369 setOperationAction(ISD::SETCC, MVT::i64, Custom);
370 setOperationAction(ISD::SETCC, MVT::f16, Custom);
371 setOperationAction(ISD::SETCC, MVT::f32, Custom);
372 setOperationAction(ISD::SETCC, MVT::f64, Custom);
373 setOperationAction(ISD::STRICT_FSETCC, MVT::f16, Custom);
374 setOperationAction(ISD::STRICT_FSETCC, MVT::f32, Custom);
375 setOperationAction(ISD::STRICT_FSETCC, MVT::f64, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 168 // Set the Custom bit if this i32 goes in the high bits of a register.
335 // The custom bit on an i32 return value indicates that it should be passed
1191 // The custom bit on an i32 return value indicates that it should be
1460 setOperationAction(ISD::LOAD, MVT::i64, Custom);
1461 setOperationAction(ISD::STORE, MVT::i64, Custom);
1486 // Custom legalize GlobalAddress nodes into LO/HI parts.
1487 setOperationAction(ISD::GlobalAddress, PtrVT, Custom);
1488 setOperationAction(ISD::GlobalTLSAddress, PtrVT, Custom);
1489 setOperationAction(ISD::ConstantPool, PtrVT, Custom);
1490 setOperationAction(ISD::BlockAddress, PtrVT, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRISelLowering.cpp | 51 setOperationAction(ISD::GlobalAddress, MVT::i16, Custom);
52 setOperationAction(ISD::BlockAddress, MVT::i16, Custom);
77 setOperationAction(ISD::ADD, MVT::i32, Custom);
78 setOperationAction(ISD::ADD, MVT::i64, Custom);
81 // this in a custom way.
82 setOperationAction(ISD::SRA, MVT::i8, Custom);
83 setOperationAction(ISD::SHL, MVT::i8, Custom);
84 setOperationAction(ISD::SRL, MVT::i8, Custom);
85 setOperationAction(ISD::SRA, MVT::i16, Custom);
86 setOperationAction(ISD::SHL, MVT::i16, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/tools/bugpoint/ |
| ExecutionDriver.cpp | 37 Custom
55 clEnumValN(CompileCustom, "compile-custom",
58 clEnumValN(Custom, "run-custom",
67 clEnumValN(Custom, "safe-run-custom",
94 cl::desc("Command to compile the bitcode (use with -compile-custom) "
99 cl::desc("Command to execute the bitcode (use with -run-custom) "
195 case Custom:
229 case Custom
[all...] |
| /src/external/gpl2/xcvs/dist/diff/ |
| libdiff.mak | 32 # Begin Custom Macros
34 # End Custom Macros
135 # Begin Custom Macros
137 # End Custom Macros
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 209 setOperationAction(ISD::ABS , MVT::i16 , Custom);
210 setOperationAction(ISD::ABS , MVT::i32 , Custom);
212 setOperationAction(ISD::ABS , MVT::i64 , Custom);
218 LegalizeAction ShiftDoubleAction = Subtarget.isSHLDSlow() ? Custom : Legal;
220 setOperationAction(ShiftOp , MVT::i8 , Custom);
221 setOperationAction(ShiftOp , MVT::i16 , Custom);
236 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
237 setOperationAction(ISD::STRICT_UINT_TO_FP, MVT::i32, Custom);
240 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
241 setOperationAction(ISD::STRICT_UINT_TO_FP, MVT::i64, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 95 setOperationAction(ISD::ADD, MVT::i64, Custom);
96 setOperationAction(ISD::SUB, MVT::i64, Custom);
97 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom);
98 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom);
114 setOperationAction(ISD::BR_JT, MVT::Other, Custom);
116 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
117 setOperationAction(ISD::BlockAddress, MVT::i32 , Custom);
120 setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
132 // Custom expand misaligned loads / stores.
133 setOperationAction(ISD::LOAD, MVT::i32, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 75 setOperationAction(ISD::SRA, MVT::i8, Custom);
76 setOperationAction(ISD::SHL, MVT::i8, Custom);
77 setOperationAction(ISD::SRL, MVT::i8, Custom);
78 setOperationAction(ISD::SRA, MVT::i16, Custom);
79 setOperationAction(ISD::SHL, MVT::i16, Custom);
80 setOperationAction(ISD::SRL, MVT::i16, Custom);
85 setOperationAction(ISD::GlobalAddress, MVT::i16, Custom);
86 setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom);
87 setOperationAction(ISD::BlockAddress, MVT::i16, Custom);
89 setOperationAction(ISD::BR_CC, MVT::i8, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 169 setOperationAction(ISD::SETCC, VT, Custom);
170 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
171 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
173 setOperationAction(ISD::SINT_TO_FP, VT, Custom);
174 setOperationAction(ISD::UINT_TO_FP, VT, Custom);
175 setOperationAction(ISD::FP_TO_SINT, VT, Custom);
176 setOperationAction(ISD::FP_TO_UINT, VT, Custom);
183 setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
184 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
192 setOperationAction(ISD::SHL, VT, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 167 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Custom);
169 // Custom lower inline assembly to check for special registers.
170 setOperationAction(ISD::INLINEASM, MVT::Other, Custom);
171 setOperationAction(ISD::INLINEASM_BR, MVT::Other, Custom);
257 setOperationAction(ISD::STRICT_SINT_TO_FP, MVT::i1, Custom);
258 setOperationAction(ISD::STRICT_UINT_TO_FP, MVT::i1, Custom);
259 setOperationAction(ISD::SINT_TO_FP, MVT::i1, Custom);
260 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom);
264 setOperationAction(ISD::LOAD, MVT::i1, Custom);
265 setOperationAction(ISD::STORE, MVT::i1, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 85 setOperationAction(ISD::BR_CC, MVT::i32, Custom);
88 setOperationAction(ISD::SETCC, MVT::i32, Custom);
90 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
92 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
93 setOperationAction(ISD::BlockAddress, MVT::i32, Custom);
94 setOperationAction(ISD::JumpTable, MVT::i32, Custom);
95 setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
97 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
101 setOperationAction(ISD::VASTART, MVT::Other, Custom);
113 setOperationAction(ISD::MUL, MVT::i32, Custom);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 75 setOperationAction(ISD::LOAD, T, Custom);
76 setOperationAction(ISD::STORE, T, Custom);
81 setOperationAction(ISD::LOAD, T, Custom);
82 setOperationAction(ISD::STORE, T, Custom);
86 setOperationAction(ISD::GlobalAddress, MVTPtr, Custom);
87 setOperationAction(ISD::GlobalTLSAddress, MVTPtr, Custom);
88 setOperationAction(ISD::ExternalSymbol, MVTPtr, Custom);
89 setOperationAction(ISD::JumpTable, MVTPtr, Custom);
90 setOperationAction(ISD::BlockAddress, MVTPtr, Custom);
91 setOperationAction(ISD::BRIND, MVT::Other, Custom);
[all...] |
| /src/share/mk/ |
| bsd.dep.mk | 102 ##### Custom rules
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| ARCISelLowering.cpp | 115 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
116 setOperationAction(ISD::BR_CC, MVT::i32, Custom);
119 setOperationAction(ISD::JumpTable, MVT::i32, Custom);
123 // Custom lower global addresses.
124 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
127 setOperationAction(ISD::VASTART, MVT::Other, Custom);
137 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Custom);
|
