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Searched
refs:D20_20
(Results
1 - 4
of
4
) sorted by relevancy
/src/external/gpl3/binutils/dist/opcodes/
s390-opc.c
172
#define
D20_20
(D_36 + 1) /* 20 bit displacement starting at 20 */
177
#define L4_8 (
D20_20
+ 1) /* 4 bit length starting at position 8 */
420
#define INSTR_RSY_RRRD 6, { R_8,R_12,
D20_20
,B_16,0,0 } /* e.g. stmy */
421
#define INSTR_RSY_RERERD 6, { RE_8,RE_12,
D20_20
,B_16,0,0 } /* e.g. cdsy */
422
#define INSTR_RSY_RURD 6, { R_8,U4_12,
D20_20
,B_16,0,0 } /* e.g. icmh */
423
#define INSTR_RSY_RURD2 6, { R_8,
D20_20
,B_16,U4_12,0,0 } /* e.g. loc */
424
#define INSTR_RSY_R0RD 6, { R_8,
D20_20
,B_16,0,0,0 } /* e.g. locne */
425
#define INSTR_RSY_AARD 6, { A_8,A_12,
D20_20
,B_16,0,0 } /* e.g. lamy */
426
#define INSTR_RSY_CCRD 6, { C_8,C_12,
D20_20
,B_16,0,0 } /* e.g. stctg */
443
#define INSTR_RXY_RRRD 6, { R_8,
D20_20
,X_12,B_16,0,0 } /* e.g. ly *
[
all
...]
/src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c
172
#define
D20_20
(D_36 + 1) /* 20 bit displacement starting at 20 */
177
#define L4_8 (
D20_20
+ 1) /* 4 bit length starting at position 8 */
420
#define INSTR_RSY_RRRD 6, { R_8,R_12,
D20_20
,B_16,0,0 } /* e.g. stmy */
421
#define INSTR_RSY_RERERD 6, { RE_8,RE_12,
D20_20
,B_16,0,0 } /* e.g. cdsy */
422
#define INSTR_RSY_RURD 6, { R_8,U4_12,
D20_20
,B_16,0,0 } /* e.g. icmh */
423
#define INSTR_RSY_RURD2 6, { R_8,
D20_20
,B_16,U4_12,0,0 } /* e.g. loc */
424
#define INSTR_RSY_R0RD 6, { R_8,
D20_20
,B_16,0,0,0 } /* e.g. locne */
425
#define INSTR_RSY_AARD 6, { A_8,A_12,
D20_20
,B_16,0,0 } /* e.g. lamy */
426
#define INSTR_RSY_CCRD 6, { C_8,C_12,
D20_20
,B_16,0,0 } /* e.g. stctg */
443
#define INSTR_RXY_RRRD 6, { R_8,
D20_20
,X_12,B_16,0,0 } /* e.g. ly *
[
all
...]
/src/external/gpl3/gdb/dist/opcodes/
s390-opc.c
172
#define
D20_20
(D_36 + 1) /* 20 bit displacement starting at 20 */
177
#define L4_8 (
D20_20
+ 1) /* 4 bit length starting at position 8 */
420
#define INSTR_RSY_RRRD 6, { R_8,R_12,
D20_20
,B_16,0,0 } /* e.g. stmy */
421
#define INSTR_RSY_RERERD 6, { RE_8,RE_12,
D20_20
,B_16,0,0 } /* e.g. cdsy */
422
#define INSTR_RSY_RURD 6, { R_8,U4_12,
D20_20
,B_16,0,0 } /* e.g. icmh */
423
#define INSTR_RSY_RURD2 6, { R_8,
D20_20
,B_16,U4_12,0,0 } /* e.g. loc */
424
#define INSTR_RSY_R0RD 6, { R_8,
D20_20
,B_16,0,0,0 } /* e.g. locne */
425
#define INSTR_RSY_AARD 6, { A_8,A_12,
D20_20
,B_16,0,0 } /* e.g. lamy */
426
#define INSTR_RSY_CCRD 6, { C_8,C_12,
D20_20
,B_16,0,0 } /* e.g. stctg */
443
#define INSTR_RXY_RRRD 6, { R_8,
D20_20
,X_12,B_16,0,0 } /* e.g. ly *
[
all
...]
/src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c
170
#define
D20_20
(D_36 + 1) /* 20 bit displacement starting at 20 */
175
#define L4_8 (
D20_20
+ 1) /* 4 bit length starting at position 8 */
430
#define INSTR_RSY_RRRD 6, { R_8,R_12,
D20_20
,B_16,0,0 } /* e.g. stmy */
431
#define INSTR_RSY_RERERD 6, { RE_8,RE_12,
D20_20
,B_16,0,0 } /* e.g. cdsy */
432
#define INSTR_RSY_RURD 6, { R_8,U4_12,
D20_20
,B_16,0,0 } /* e.g. icmh */
433
#define INSTR_RSY_RURD2 6, { R_8,
D20_20
,B_16,U4_12,0,0 } /* e.g. loc */
434
#define INSTR_RSY_R0RD 6, { R_8,
D20_20
,B_16,0,0,0 } /* e.g. locne */
435
#define INSTR_RSY_AARD 6, { A_8,A_12,
D20_20
,B_16,0,0 } /* e.g. lamy */
436
#define INSTR_RSY_CCRD 6, { C_8,C_12,
D20_20
,B_16,0,0 } /* e.g. stctg */
453
#define INSTR_RXY_RRRD 6, { R_8,
D20_20
,X_12,B_16,0,0 } /* e.g. ly *
[
all
...]
Completed in 28 milliseconds
Indexes created Mon Mar 02 05:31:46 UTC 2026