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    Searched refs:DENTIST_DISPCLK_CNTL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
clk_mgr_internal.h 91 .DENTIST_DISPCLK_CNTL = mmDENTIST_DISPCLK_CNTL
94 SR(DENTIST_DISPCLK_CNTL)
102 SR(DENTIST_DISPCLK_CNTL), \
111 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, mask_sh)
114 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, mask_sh),\
115 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, mask_sh)
125 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_WDIVIDER, mask_sh),\
126 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_CHG_DONE, mask_sh)
167 uint32_t DENTIST_DISPCLK_CNTL;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/
amdgpu_dcn20_clk_mgr.c 142 REG_UPDATE(DENTIST_DISPCLK_CNTL,
144 // REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 5, 100);
145 REG_UPDATE(DENTIST_DISPCLK_CNTL,
147 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_CHG_DONE, 1, 5, 100);
364 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, &dispclk_wdivider);
365 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_WDIVIDER, &dppclk_wdivider);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/
amdgpu_dce_clk_mgr.c 45 * TODO: remove this when DPREFCLK_CNTL and dpref DENTIST_DISPCLK_CNTL
148 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, &dprefclk_wdivider);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_dce6_afmt.c 309 unsigned int div = (RREG32(DENTIST_DISPCLK_CNTL) &
sid.h 920 #define DENTIST_DISPCLK_CNTL 0x0490
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_clk_mgr.c 167 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, &dprefclk_wdivider);

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