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Searched
refs:EN
(Results
1 - 13
of
13
) sorted by relevancy
/src/regress/sys/fs/ffs/
Makefile
24
EN
?= be
40
MAKECMD= ${MAKE} -f ${SRCDIR}/Makefile SRCDIR=${SRCDIR}
EN
=${
EN
} VND=${VND} MPART=${MPART} RPART=${RPART}
43
${MAKECMD}
EN
=be makeregress
45
${MAKECMD}
EN
=le makeregress
87
.if (${
EN
} == le)
107
"${TMPIM}, ${
EN
} byte order."
111
newfs -B ${
EN
} -i 500 -b 8192 -f 1024 ${CVND}${MPART}
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/
amdgpu_hw_gpio.c
52
REG_GET(EN_reg,
EN
, &gpio->store.
en
);
61
REG_UPDATE(EN_reg,
EN
, gpio->store.
en
);
115
/* We use (
EN
) to faster switch (used in DDC GPIO).
116
* So (A) is grounded, output is driven by (
EN
= 0)
117
* to pull the line down (output == 0) and (
EN
=1)
119
REG_UPDATE(EN_reg,
EN
, ~value);
156
REG_UPDATE(EN_reg,
EN
, 0);
166
/* grounding the A register then use the
EN
register bi
[
all
...]
generic_regs.h
42
GENERIC_GPIO_REG_LIST_ENTRY(
EN
, cd, id),\
ddc_regs.h
45
DDC_GPIO_REG_LIST_ENTRY(
EN
,cd,id),\
68
DDC_GPIO_VGA_REG_LIST_ENTRY(
EN
,cd),\
85
DDC_GPIO_I2C_REG_LIST_ENTRY(
EN
,cd),\
hpd_regs.h
50
HPD_GPIO_REG_LIST_ENTRY(
EN
,cd,id),\
/src/sys/external/bsd/drm2/dist/drm/radeon/
trinityd.h
219
# define
EN
(1 << 9)
radeon_trinity_dpm.c
768
WREG32_P(CG_CG_VOLTAGE_CNTL, 0, ~
EN
);
798
WREG32_P(CG_CG_VOLTAGE_CNTL,
EN
, ~
EN
);
/src/sys/dev/ic/
aacreg.h
1439
struct aac_AifEventNotify
EN
; /* Event notify */
/src/share/terminfo/
terminfo
1573
# I renamed GS/GE/HM/
EN
/PU/PD/RT and added klone+sgr-dumb, based
3329
# https://secure.wikimedia.org/wikipedia/
en
/wiki/Nextstep
4643
# https://learn.microsoft.com/
en
-us/windows/console/mouse-event-record-str
7138
ech=\Ej%p1%d;, ed=\
EN
, el=\EK, el1=\EL, home=\EE0;0;, ht=^I,
8082
cup=\EG%p2%c%p1%c, cuu1=\EA, dch1=\EM, dl1=\
EN
, ed=\EL,
8842
# https://manpages.ubuntu.com/manpages/bionic/
en
/man1/shelltool.1.html
8843
# https://manpages.ubuntu.com/manpages/bionic/
en
/man1/cmdtool.1.html
8956
home=\ER, ht=^I, il1=\EA, ind=\EW, is1=\
EN
*, kcub1=\E[D,
8959
sgr0=\
EN
*, smcup=\EOt, smir=\EOi, smso=\EOo, smul=\EOu,
12070
21l\E[=23l\E[=3l\E_40\E_50\
En
\Ew\Ee\s\Ex0\0\0\Ex1\0\
[
all
...]
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v9_0.c
3471
WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL,
EN
, 0);
3852
WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL,
EN
, 0);
amdgpu_gfx_v10_0.c
3363
WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL,
EN
, 0);
amdgpu_gfx_v7_0.c
3067
tmp = REG_SET_FIELD(tmp, CP_PQ_WPTR_POLL_CNTL,
EN
, 0);
amdgpu_gfx_v8_0.c
4588
WREG32_FIELD(CP_PQ_WPTR_POLL_CNTL,
EN
, 0);
Completed in 892 milliseconds
Indexes created Sun Feb 15 12:34:49 CET 2026